A fast and low noise charge sensitive preamplifier in 90 nm CMOS technology

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Published 3 January 2012 Published under licence by IOP Publishing Ltd
, , Citation A Baschirotto et al 2012 JINST 7 C01003 DOI 10.1088/1748-0221/7/01/C01003

1748-0221/7/01/C01003

Abstract

A fast charge sensitive preamplifier was designed and built in a 90 nm CMOS technology. The work is part of the R&D effort towards the read out of pixel or small strip sensors in next generation HEP experiments. The preamplifier features outstanding noise performance given its wide bandwidth, with a ENC (equivalent noise charge) of about 350 electrons RMS with a detector of 1 pF capacitance. With proper filtering, the ENC drops to less than 200 electrons RMS. Power consumption is 5 mW for one channel, and the closed loop bandwith is about 180 MHz, for a risetime down to 2 ns in the fastest operation mode. Thanks to some freedom left to the user in setting the open loop gain, detectors with larger source capacitance can be read out without significant loss in bandwidth, being the rise time still 5.5 ns for a 5.6 pF detector. The output can drive a 50 Ω terminated transmission line.

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