Aberration-corrected high-resolution transmission electron microscopy (HRTEM) is used to measure strain in a strained-silicon metal-oxide-semiconductor field-effect transistor. Strain components parallel and perpendicular to the gate are determined directly from the HRTEM image by geometric phase analysis. ${\mathrm{Si}}_{80}{\mathrm{Ge}}_{20}$ source and drain stressors lead to uniaxial compressive strain in the Si channel, reaching a maximum value of $-1.3\%$ just below the gate oxide, equivalent to 2.2 GPa. Strain maps obtained by linear elasticity theory, modeled with the finite-element method, agree with the experimental results to within 0.1%.

• Received 22 October 2007

DOI:https://doi.org/10.1103/PhysRevLett.100.156602