Coherent gate errors are a concern in many proposed quantum-computing architectures. Here, we show that certain coherent errors can be reduced by a local optimization that chooses between two forms of the same Hermitian and unitary quantum gate. We refer to this method as hidden inverses, and it relies on constructing the same gate from either one sequence of physical operations or the inverted sequence of inverted operations. We use parity-controlled $Z$ rotations as our model circuit and numerically show the utility of hidden inverses as a function of circuit width $n$. We experimentally demonstrate the effectiveness for $n=2$ and $n=4$ qubits in a trapped-ion quantum computer. We numerically compare the method to other gate-level compilations for reducing coherent errors.

• Received 11 April 2021
• Revised 10 February 2022
• Accepted 16 February 2022

DOI:https://doi.org/10.1103/PhysRevApplied.17.034074

Published by the American Physical Society under the terms of the Creative Commons Attribution 4.0 International license. Further distribution of this work must maintain attribution to the author(s) and the published article's title, journal citation, and DOI.

Published by the American Physical Society