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As optical lithography continues to extend into low-k1 regime, resolution of mask patterns under mask inspection optical
conditions continues to diminish. Furthermore, as mask complexity and MEEF has also increased, it requires detecting
even smaller defects in the already narrower pitch mask patterns. This leaves the mask inspection engineer with the
option to either purchase a higher resolution mask inspection tool or increase the detector sensitivity on the existing
inspection system or maybe even both. In order to meet defect sensitivity requirements in critical features of sub-32nm
node designs, increasing sensitivity typically results in increased nuisance (i.e., small sub-specification) defect detection
by 5-20X defects making post-inspection defect review non-manufacturable.
As a solution for automatically dispositioning the increased number of nuisance and real defects detected at higher
inspection sensitivity, Luminescent has successfully extended Inverse Lithography Technology (ILT) and its patented
level-set methods to reconstruct the defective mask from its inspection image, and then perform simulated AIMS
dispositioning on the reconstructed mask. In this technique, named Lithographic Plane Review (LPR), inspection
transmitted and reflected light images of the test (i.e. defect) and reference (i.e., corresponding defect-free) regions are
provided to the "inversion" engine which then computes the corresponding test and reference mask patterns. An essential
input to this engine is a well calibrated model incorporating inspection tool optics, mask processing and 3D effects, and
also the subsequent AIMS tool optics to be able to then simulate the aerial image impact of the defects. This flow is
equivalent to doing an actual AIMS tool measurement of every defect detected during mask inspection, while at the same
time maintaining inspection at high enough resolution. What makes this product usable in mask volume production is the
high degree of accuracy of mask defect reconstruction, predicting actual AIMS measurements to within ±4% CD error
for > 95% of defects while not missing any OOS (out-of-specification) defect and maintaining high simulation
throughput of ≥250 defects/min on Luminescent's distributed computing platform. This technique enables inspection
recipes to be setup based on the sensitivity required to detect small but lithographically-significant defects, even if in the
process a large number of nuisance defects are detected.
LPR is being implemented as an integral part of defect classification for high-volume sub-32nm technology nodes and
higher. Furthermore, this technique will be essential to the lithographic disposition of defects detected on EUV masks
inspected under non-actinic conditions.
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