Impact Of Mask Defects On Integrated Circuits Yield

Jacques Le Carpentier

doi:10.1117/12.935137

7 November 1983 Impact Of Mask Defects On Integrated Circuits Yield

Jacques Le Carpentier

Proceedings Volume 0394, Optical Microlithography II: Technology for the 1980s; (1983) https://doi.org/10.1117/12.935137
Event: 1983 Microlithography Conferences, 1983, Santa Clara, United States

Abstract

The influence of mask defects on integrated circuits yield was studied by comparing the data given by an automatic mask inspection system to the die sort yield at probe test level. It was found that the yield losses due to mask defects can vary from a few % to more than 50 %, as a function of the type of defects, layer involved and defect size.

Citation Download Citation

Jacques Le Carpentier "Impact Of Mask Defects On Integrated Circuits Yield", Proc. SPIE 0394, Optical Microlithography II: Technology for the 1980s, (7 November 1983); https://doi.org/10.1117/12.935137

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available