エアロゾル研究
Online ISSN : 1881-543X
Print ISSN : 0912-2834
ISSN-L : 0912-2834
特集「エンハンスト・クリーンルーム・テクノロジー:半導体における汚染制御」
International Technology Roadmap for Semiconductors 2003の要求清浄度について - シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について -
飯田 裕幸竹田 菊男藤本 武利
著者情報
ジャーナル フリー

2004 年 19 巻 3 号 p. 177-180

詳細
抄録

This paper describes the cleanliness levels for the manufacturing environment and silicon wafer surface required by International Technology Roadmap for Semiconductors 2003. Concerning the contamination level for particles there is no significant revision from the 2001 version. As for AMCs, the required level of organic contaminants is expressed in terms of C16H34 instead of CH4. Table 114 of Technology Requirement for Wafer Environmental Contamination Control summarizes the levels of Surface Molecular Contaminants (SMCs) which are the adsorbed amounts of SMCs after 24-hour exposure of wafer to the air in FOUP (Front Opening Unified Pod) , Pod, Mini-environment as well as clean room air. Recent levels of detection limits of various analytical methods are discussed, and the analysis results for both SMCs on silicon wafer exposed to the air in carrier case and the AMCs in the atmosphere are introduced.

著者関連情報
© 2004 日本エアロゾル学会
前の記事 次の記事
feedback
Top