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Analysis of Thermal Effect on the Interfacial Oxide between Polysilicon and Silicon for Polysilicon Bipolar Transistors by Capacitance and Contact Resistance Measurements

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Copyright (c) 1996 The Japan Society of Applied Physics
, , Citation Noboru Nakano et al 1996 Jpn. J. Appl. Phys. 35 5670 DOI 10.1143/JJAP.35.5670

1347-4065/35/11R/5670

Abstract

Thermal effect on the interfacial oxide between polysilicon and silicon doped with arsenic was analyzed by capacitance and contact resistance measurements. The annealing temperature was varied from 850° C to 1000° C and, with the increase of annealing temperature, the oxide breakup was enhanced and the contact resistance decreased. It is shown for the first time that the capacitance also decreased with the increase of annealing temperature. This suggests that the interfacial area of the oxide layer decreases and the oxide layer thickness increases due to the oxide breakup. Capacitance characteristics are also compared with bipolar transistor characteristics.

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10.1143/JJAP.35.5670