Deep-Submicron Lightly-Doped-Drain and Single-Drain Metal-Oxide-Semiconductor Transistor Drain Current Model for Circuit Simulation

A new deep submicron I–V model for lightly-doped drain (LDD) and single-drain (SD) metal-oxide-semiconductor-field-effect-transistors (MOSFET) is presented. The physics-based and analytical model is developed using the drift-diffusion equation with a modified mobility formula to consider the effect of velocity overshoot and based on the quasi-two-dimensional Poisson equation. The drain-induced-barrier-lowering (DIBL), channel-length modulation, velocity overshoot, and parasitic source and drain resistances have been included in the model in a physically consistent manner. In this model, the LDD region is treated as a bias-dependent series resistance, and the drain-voltage drop across the LDD region has been considered in modeling the DIBL effect. This model is smoothly-continuous and valid in all regions of operation, its accuracy has been checked by comparing the calculated drain current, conductance and transconductance with the experimental data.