Y. Yang
ABSTRACT
In this paper, an efficient immunity method is proposed for two-prime RSA cryptosystem against hardware fault attack. The proposed system has more immunity than the previous system and is targeted for FPGA implementation. For the 32-bit signing case, the proposed method is 15% faster than the previous design while requiring only 70% of the hardware resource.
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Digital Library
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Index Terms
- Two-prime RSA immune cryptosystem and its FPGA implementation
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