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A CAD system for the design of field programmable gate arrays

Published:01 June 1991Publication History
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References

  1. 1.R. K. Brayton, G. D. Hachtel, C. T. McMullen, and A. L. Sangiovanni-Vincentelli. Logic Minimization Algorithms for VLSI Synthesis. Kluwer Academic Publishers, 1984. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. 2.S. Brown, J. Rose, and Z. Vranesic. A detailed router for field-programmable gate arrays. Proc ICCAD, pages 382- 385, Nov. 1990.Google ScholarGoogle ScholarCross RefCross Ref
  3. 3.R. Francis, J. Rose, and K. Chung. Chortle: A technology mapping program for lookup table-based field programmable gate arrays. Proc. Design Automation Conference, pages 613-691, 1990. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. 4.J. Greene, V. Roychowdhury, S. Kaptanoglu, and A. E1Gareal. Segmented channel routing. Proc DAC, pages 567-572, June 1990. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. 5.D. Hill and D. Cassiday. Preliminary description of tabula rasa: An electrically reconfigurable hardware engine. International Conference on Computer and Design, 1990.Google ScholarGoogle ScholarCross RefCross Ref
  6. 6.D. Hill, D. Shugard, J. Fishburn, and K. Keutzer. Algorithms and Techniques for VLSI Layout Synthesis. Kluwer Academic Publishers, 1984. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. 7.MCNC and U. of California, Berkeley. Logic Synthesis and Optimization Benchmarks User Guide, Version 3.0. MCNC, 1991.Google ScholarGoogle Scholar
  8. 8.J. Rose and S. Brown. Flexibility of interconnection structures in field-programmable gate arrays. IEEE Journal of Solid State Circuits, 26(3):277-282, March 1990.Google ScholarGoogle ScholarCross RefCross Ref
  9. 9.N. Woo. A heuristic method for fpga technology mapping based on edge visibility. Proceedings of DAC, I991. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. 10.Xilinx Corporation. Xilinx Programmable Gate Array User's Guide. Xilinx, 1988.Google ScholarGoogle Scholar
  11. 11.Xilinx Corporation. Technical Data Book: XC 4000 Logic Cell Array Family. Xilinx, 1990.Google ScholarGoogle Scholar

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  1. A CAD system for the design of field programmable gate arrays

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                cover image ACM Conferences
                DAC '91: Proceedings of the 28th ACM/IEEE Design Automation Conference
                June 1991
                783 pages
                ISBN:0897913957
                DOI:10.1145/127601

                Copyright © 1991 ACM

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                Publication History

                • Published: 1 June 1991

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