Julie Shipnes
- 1 Anderson, W. An overview of motorola's Power PC simulator family. Commun.ACM (June 1994). Google Scholar
Digital Library
- 2 Diep, T., Shen, j. and Phillip, M. EX- PLORER: A retargetable and visualization-.based simulator for superscalar processors, in Proceedings of the Twenty- Sixth international Symposium on Microarchitecture, Austin, Tex., Dec. 1993. Google ScholarDigital Library
- 3 PowerOpen Application Binary Interface. Draft for First ed., IBM, Oct. 1993.Google Scholar
- 4 PowerPC User instruction Set Architecture. Book I, Version 1.04, May 4, 1993.Google Scholar
- 5 PowerPC Virtual Environment arhitecture. Book II, Version 1.04, May 4, 1993.Google Scholar
- 6 Software prefetching. SIGPLAN Not. 26, 4 (Apr. 1991), 40-52.Google Scholar
Index Terms
- A modular approach to Motorola PowerPC compilers
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Reviews
Motorola has developed a highly optimizing, modular compilation environment that can be quickly adapted to various PowerPC microprocessor and system configurations. This suite of C, C++, and FORTRAN compilers is designed to meet the following criteria: highly optimizing (optimal performance for PowerPC microprocessors), highly retargetable (rapid time-to-market), highly configurable (supporting multiple object file and debugging formats), and compliant to software standards (portability of code between chips). This paper describes the modular structure of the compiler and the data and information flow through the major phases of the compiler. It also discusses architecture and implementation-specific optimizations currently performed in the PC compilers. To help the reader understand the features of the compiler, the paper also describes some characteristics of the Power PC architecture that distinguish it from other architectures. Next, the authors describe the differences among PowerPC microarchitectures. The microarchitecture defines the execution units, the pipelines, the bus, and the memory model of a microprocessor. These aspects can significantly affect performance. Motorola compilers can be quickly customized for individual PowerPC implementations, including the 601, 603, 604, and 620 microprocessors. There are ongoing efforts to integrate the compilers with simulators, debuggers, and programming environments for all segments of the computer industry.
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