Michael F. Spear
ABSTRACT
When a program uses Software TransactionalMemory (STM) to synchronize accesses to shared memory, the performance often depends on which STM implementation is used. Implementation vary greatly in their underlying mechanisms, in the features they provide, and in the assumptions they make about the common case. Consequently, the best choice of algorithm is workload-dependent. Worse yet, for workload composed of multiple phases of execution, the "best choice of implementation may change during execution.
We present a low-overhead system for adapting between STM implementations. Like previous work, our system enable adaptivity between different parameterizations of a given algorithm, and it allows adapting between the use of transactions and coarse-grained locks. In addition, we support dynamic switching between fundamentally different STM implementations. We also explicitly support irrevocability retry-based condition synchronization, and privatization. Through a series of experiments, we show that our system introduces negligible overhead. We also present a candidate use of dynamic adaptivity, as a replacement for contention management. When using adaptivity in this manner, STM implementations can be simplified to a great degree without lowering throughput or introducing a risk of pathological slowdown, even for challenging workloads.
- M. Abadi, T. Harris, and M. Mehrara. Transactional Memory with Strong Atomicity Using Off-the-Shelf Memory Protection Hardware. In Proceedings of the 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Raleigh, NC, Feb. 2009. Google Scholar
Digital Library
- B. H. Bloom. Space/Time Trade-offs in Hash Coding with Allowable Errors. Communications of the ACM, 13(7):422--426, 1970. Google ScholarDigital Library
- C. Blundell, J. Devietti, E. C. Lewis, and M. Martin. Making the Fast Case Common and the Uncommon Case Simple in Unbounded Transactional Memory. In Proceedings of the 34th International Symposium on Computer Architecture, San Diego, CA, June 2007. Google ScholarDigital Library
- C. Cao Minh, J. Chung, C. Kozyrakis, and K. Olukotun. STAMP: Stanford Transactional Applications for Multi-processing. In Proceedings of the IEEE International Symposium on Workload Characterization, Seattle, WA, Sept. 2008.Google ScholarCross Ref
- L. Dalessandro, M. F. Spear, and M. L. Scott. NOrec: Streamlining STM by Abolishing Ownership Records. In Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Bangalore, India, Jan. 2010. Google ScholarDigital Library
- D. Dice, Y. Lev, M. Moir, and D. Nussbaum. Early Experience with a Commercial Hardware Transactional Memory Implementation. In Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, Washington, DC, Mar. 2009. Google ScholarDigital Library
- D. Dice, O. Shalev, and N. Shavit. Transactional Locking II. In Proceedings of the 20th International Symposium on Distributed Computing, Stockholm, Sweden, Sept. 2006. Google ScholarDigital Library
- D. Dice and N. Shavit. TLRW: Return of the Read-Write Lock. In Proceedings of the 4th ACM SIGPLAN Workshop on Transactional Computing, Raleigh, NC, Feb. 2009.Google Scholar
- S. Diestelhorst and M. Hohmuth. Hardware Acceleration for Lock-Free Data Structures and Software-Transactional Memory. In Proceedings of the Workshop on Exploiting Parallelism with Transactional Memory and other Hardware Assisted Methods, Boston, MA, Apr. 2008.Google Scholar
- P. Felber, C. Fetzer, U. Müller, T. Riegel, M. Süßkraut, and H. Sturzrehm. Transactifying Applications using an Open Compiler Framework. In Proceedings of the 2nd ACM SIGPLAN Workshop on Transactional Computing, Portland, OR, Aug. 2007.Google Scholar
- P. Felber, C. Fetzer, and T. Riegel. Dynamic Performance Tuning of Word-Based Software Transactional Memory. In Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Salt Lake City, UT, Feb. 2008. Google ScholarDigital Library
- K. Fraser. Practical Lock-Freedom. PhD thesis, King's College, University of Cambridge, Sept. 2003.Google Scholar
- J. Gottschlich and D. Connors. Extending Contention Managers for User-Defined Priority-Based Transactions. In Proceedings of the Workshop on Exploiting Parallelism with Transactional Memory and other Hardware Assisted Methods, Boston, MA, Apr. 2008.Google Scholar
- R. Guerraoui, M. Herlihy, and B. Pochon. Toward a Theory of Transactional Contention Managers. In Proceedings of the 24th ACM Symposium on Principles of Distributed Computing, Las Vegas, NV, July 2005. Google ScholarDigital Library
- T. Harris, S. Marlow, S. Peyton Jones, and M. Herlihy. Composable Memory Transactions. In Proceedings of the 10th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Chicago, IL, June 2005. Google ScholarDigital Library
- R. L. Hudson, B. Saha, A.-R. Adl-Tabatabai, and B. Hertzberg. A Scalable Transactional Memory Allocator. In Proceedings of the 2006 International Symposium on Memory Management, Ottawa, ON, Canada, June 2006. Google ScholarDigital Library
- J. Lau, E. Perelman, and B. Calder. Selecting Software Phase Markers with Code Structure Analysis. In Proceedings of the 2006 International Symposium on Code Generation and Optimization, New York, NY, Mar. 2006. Google ScholarDigital Library
- Y. Lev, V. Luchangco, V. Marathe, M. Moir, D. Nussbaum, and M. Olszewski. Anatomy of a Scalable Software Transactional Memory. In Proceedings of the 4th ACM SIGPLAN Workshop on Transactional Computing, Raleigh, NC, Feb. 2009.Google Scholar
- Y. Lev, M. Moir, and D. Nussbaum. PhTM: Phased Transactional Memory. In Proceedings of the 2nd ACM SIGPLAN Workshop on Transactional Computing, Portland, OR, Aug. 2007.Google Scholar
- V. Marathe and M. Moir. Toward High Performance Nonblocking Software Transactional Memory. In Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Salt Lake City, UT, Feb. 2008. Google ScholarDigital Library
- V. J. Marathe, W. N. Scherer III, and M. L. Scott. Adaptive Software Transactional Memory. In Proceedings of the 19th International Symposium on Distributed Computing, Cracow, Poland, Sept. 2005. Google ScholarDigital Library
- V. J. Marathe, M. F. Spear, C. Heriot, A. Acharya, D. Eisenstat, W. N. Scherer III, and M. L. Scott. Lowering the Overhead of Nonblocking Software Transactional Memory. In Proceedings of the 1st ACM SIGPLAN Workshop on Languages, Compilers, and Hardware Support for Transactional Computing, Ottawa, ON, Canada, June 2006.Google Scholar
- V. J. Marathe, M. F. Spear, and M. L. Scott. Scalable Techniques for Transparent Privatization in Software Transactional Memory. In Proceedings of the 37th International Conference on Parallel Processing, Portland, OR, Sept. 2008. Google ScholarDigital Library
- J. M. Mellor-Crummey and M. L. Scott. Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors. ACM Transactions on Computer Systems, 9(1), 1991. Google ScholarDigital Library
- V. Menon, S. Balensiefer, T. Shpeisman, A.-R. Adl-Tabatabai, R. Hudson, B. Saha, and A. Welc. Practical Weak-Atomicity Semantics for Java STM. In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures, Munich, Germany, June 2008. Google ScholarDigital Library
- Y. Ni, A. Welc, A.-R. Adl-Tabatabai, M. Bach, S. Berkowits, J. Cownie, R. Geva, S. Kozhukow, R. Narayanaswamy, J. Olivier, S. Preis, B. Saha, A. Tal, and X. Tian. Design and Implementation of Transactional Constructs for C/C++. In Proceedings of the 23rd ACM SIGPLAN Conference on Object Oriented Programming Systems Languages and Applications, Nashville, TN, USA, Oct. 2008. Google ScholarDigital Library
- M. Olszewski, J. Cutler, and J. G. Steffan. JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory. In Proceedings of the 16th International Conference on Parallel Architecture and Compilation Techniques, Brasov, Romania, Sept. 2007. Google ScholarDigital Library
- T. Riegel, P. Felber, and C. Fetzer. A Lazy Snapshot Algorithm with Eager Validation. In Proceedings of the 20th International Symposium on Distributed Computing, Stockholm, Sweden, Sept. 2006. Google ScholarDigital Library
- T. Riegel, C. Fetzer, and P. Felber. Automatic Data Partitioning in Software Transactional Memories. In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures, Munich, Germany, June 2008. Google ScholarDigital Library
- Rochester Synchronization Group, Department of Computer Science, University of Rochester. Rochester STM, 2006--2010. http://www.cs.rochester.edu/ research/synchronization/rstm/.Google Scholar
- B. Saha, A.-R. Adl-Tabatabai, and Q. Jacobson. Architectural Support for Software Transactional Memory. In Proceedings of the 39th IEEE/ACM International Symposium on Microarchitecture, Orlando, FL, Dec. 2006. Google ScholarDigital Library
- W. N. Scherer III and M. L. Scott. Advanced Contention Management for Dynamic Software Transactional Memory. In Proceedings of the 24th ACM Symposium on Principles of Distributed Computing, Las Vegas, NV, July 2005. Google ScholarDigital Library
- X. Shen, Y. Zhong, and C. Ding. Locality Phase Prediction. In Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, MA, Oct. 2004. Google ScholarDigital Library
- N. Sonmez, T. Harris, A. Cristal, O. S. Unsal, and M. Valero. Taking the Heat Off Transactions: Dynamic Selection of Pessimistic Concurrency Control. In Proceedings of the 23rd International Parallel and Distributed Processing Symposium, Rome, Italy, May 2009. Google ScholarDigital Library
- M. F. Spear, L. Dalessandro, V. J. Marathe, and M. L. Scott. Ordering-Based Semantics for Software Transactional Memory. In Proceedings of the 12th International Conference On Principles Of DIstributed Systems, Luxor, Egypt, Dec. 2008. Google ScholarDigital Library
- M. F. Spear, L. Dalessandro, V. J. Marathe, and M. L. Scott. A Comprehensive Strategy for Contention Management in Software Transactional Memory. In Proceedings of the 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Raleigh, NC, Feb. 2009. Google ScholarDigital Library
- M. F. Spear, K. Kelsey, T. Bai, L. Dalessandro, M. L. Scott, C. Ding, and P. Wu. Fastpath Speculative Parallelism. In Proceedings of the 22nd International Workshop on Languages and Compilers for Parallel Computing, Newark, DE, Oct. 2009. Google ScholarDigital Library
- M. F. Spear, V. J. Marathe, W. N. Scherer III, and M. L. Scott. Conflict Detection and Validation Strategies for Software Transactional Memory. In Proceedings of the 20th International Symposium on Distributed Computing, Stockholm, Sweden, Sept. 2006. Google ScholarDigital Library
- M. F. Spear, M. M. Michael, and M. L. Scott. Inevitability Mechanisms for Software Transactional Memory. In Proceedings of the 3rd ACM SIGPLAN Workshop on Transactional Computing, Salt Lake City, UT, Feb. 2008.Google Scholar
- M. F. Spear, M. M. Michael, M. L. Scott, and P. Wu. Reducing Memory Ordering Overheads in Software Transactional Memory. In Proceedings of the 2009 International Symposium on Code Generation and Optimization, Seattle, WA, Mar. 2009. Google ScholarDigital Library
- M. F. Spear, M. M. Michael, and C. von Praun. RingSTM: Scalable Transactions with a Single Atomic Instruction. In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures, Munich, Germany, June 2008. Google ScholarDigital Library
- M. F. Spear, A. Shriraman, L. Dalessandro, and M. Scott. Transactional Mutex Locks. In Proceedings of the 4th ACM SIGPLAN Workshop on Transactional Computing, Raleigh, NC, Feb. 2009.Google Scholar
- T. Usui, Y. Smaragdakis, R. Behrends, and J. Evans. Adaptive Locks: Combining Transactions and Locks for Efficient Concurrency. In Proceedings of the 18th International Conference on Parallel Architecture and Compilation Techniques, Raleigh, NC, Sept. 2009. Google ScholarDigital Library
- C. Wang, W.-Y. Chen, Y. Wu, B. Saha, and A.-R. Adl-Tabatabai. Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language. In Proceedings of the 2007 International Symposium on Code Generation and Optimization, San Jose, CA, Mar. 2007. Google ScholarDigital Library
- A. Welc, B. Saha, and A.-R. Adl-Tabatabai. Irrevocable Transactions and their Applications. In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures, Munich, Germany, June 2008. Google ScholarDigital Library
Index Terms
- Lightweight, robust adaptivity for software transactional memory
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