Ann Marie Grizzaffi Maynard
ABSTRACT
Experience has shown that many widely used benchmarks are poor predictors of the performance of systems running commercial applications. Research into this anomaly has long been hampered by a lack of address traces from representative multi-user commercial workloads. This paper presents research, using traces of industry-standard commercial benchmarks, which examines the characteristic differences between technical and commercial workloads and illustrates how those differences affect cache performance.
Commercial and technical environments differ in their respective branch behavior, operating system activity, I/O, and dispatching characteristics. A wide range of uniprocessor instruction and data cache geometries were studied. The instruction cache results for commercial workloads demonstrate that instruction cache performance can no longer be neglected because these workloads have much larger code working sets than technical applications. For database workloads, a breakdown of kernel and user behavior reveals that the application component can exhibit behavior similar to the operating system and therefore, can experience miss rates equally high. This paper also indicates that “dispatching” or process switching characteristics must be considered when designing level-two caches. The data presented shows that increasing the associativity of second-level caches can reduce miss rates significantly. Overall, the results of this research should help system designers choose a cache configuration that will perform well in commercial markets.
- Agarwal 88.Anant Agarwal, "Analysis of Cache Performance for Operating Systems and Multi-programming", ACM Transactions on Computer Systems, Vol. 6. No. 4, Nov. 1988. Google Scholar
Digital Library
- Bell 74.James Bell and David Casasent, "An investigation of Alternative Cache Organizations", IEEE Transactions on Computers, Vol. C-23. No. 4, April 1974, p. 346-351.Google Scholar
- Borg 89.Anita Borg, R.E. Kessler, Georgia Lazana, and David W. Wall, "Long Address Traces from RISC Machines: Generation and Analysis'', WRL Research Report 89/14, DEC Research Lab, Sept. 1989.Google Scholar
- Chen 93.J. Bradley Chert and Brian N. Bershad, "The Impact of Operating System Structure on Memory System Performance", Operating Systems Review, Vol. 27., No. 5, Dec. 1993. Google ScholarDigital Library
- Clark 83.Douglas W. Clark, "Cache Performance in the VAX-11/ 780", ACM Transactions on Computer Systems, Vol. 1., No. 1, Feb. 1983. Google ScholarDigital Library
- Conte 91.Thomas M. Conte and Wen-mei W. Hwu, "Benchmark Characterization", Computer, January 1991, pp 48-56. Google ScholarDigital Library
- Cvetanovic 94.Zarka Cvetanovic and Dileep Bhandarkar, "Characterization of Alpha Performance using TP and SPEC Workloads", Proceedings of the 21th international Symposium on Computer Architecture, Chicago, Illinois, April 18-21, 1994. Google ScholarDigital Library
- Franklin 93.M. Franklin, W. Alexander, R. Jauhari, A. M. G. Maynard, and B. R. Olszewski, "Commercial Workload Performance in the IBM POWER2 RISC System/6000 Processor," IBM Journal of Research and Development, Vol. 38, No. 4, July 1994. Google ScholarDigital Library
- Gee 93.Jeffrey D. Gee, Mark D. Hill, Dionisios N. Pnevmatikatos, Alan Jay Smith, "Cache Performance of the SPEC92 Benchmark Suite", IEEE Micro, Aug. 1993, p. 17-27. Google ScholarDigital Library
- Hennessy 90.John L. Hennessy and David A. Patterson, "Computer Architecture: A Quantitative Approach", Morgan Kaufmann Publishers, Inc., 1990. Google ScholarDigital Library
- Jouppi 90.Norma P. Jouppi, "Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers", 17th Annual international Symposium on Computer Architecture, Seattle, Washington, May 1990. Google ScholarDigital Library
- Maynard 94.Ann Marie Grizzaffi Maynard, Colette M. Donnelly, Bret R. Olszewski, "Contrasting Characteristics and Cache Performance of Technical and Multi-User Commercial Workloads", IBM Technical Report, 1994. (submitted for pubhcauon)Google Scholar
- McGrory 92.John J. McGrory II, Alexander Carlton, and Bradley J. Askins, "Transaction Processing Performance on PA-RISC Commercial Unix Systems", COMPCON, Spring 1992, 37th IEEE Computer Society International Conference, San Francisco, CA., Feb. 1992, p. 199-206. Google ScholarDigital Library
- Misra 90.M. Misra, ed., IBM RISC System/6000 Technology, IBM Corporation, 1990, IBM Publication SA 23-2619.Google Scholar
- Poursepanj 94.A. Poursepanj et aL, "The PowerPCTM 603 Microprocessor: Performance Analysis and Design Trade-offs," Proceedings of COMPCON 1994, February 1994.Google Scholar
- Przybylski 90.Cache and Memory Hierarchy Design: A Performance Directed Approach, Morgan Kaufmann Publishers, Inc., 1990. Google ScholarDigital Library
- Smith 82.Alan Jay Smith, "Cache Memories", Computing Surveys, Vol. 14, No. 3, Sept. 1982.Google Scholar
- Smith 85.Alan Jay Smith, "Cache Evaluataons and the Impact of Workload Chome", 12th Annual International Symposium on Computer Architecture Conference Proceedings, Boston, MA, June 17-19, 1985. Google ScholarDigital Library
- SPEC 91.SPEC Newsletter, Vol. 3., No. 4, December 1991, pp 18-21.Google Scholar
- Stephens 91.Chriss Stephens, Bryce CogsweU, John Heinlem, Gregory Palmer, and John P. Shen, "Instruction Level Profiling and Evaluation of the IBM RISC System/60000", Proceedings of the 18th International Symposium on Computer Architecture, Toronto, Canada, May 1991. Google ScholarDigital Library
- Torrellas 92.Josep Torrellas, Anoop Gupta, and John Hennessy, "Characterizing the Caching and SynchronizaUon Performance of a Multiprocessor Operating System", Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, MA, October 12-15, 1992. Google ScholarDigital Library
Index Terms
- Contrasting characteristics and cache performance of technical and multi-user commercial workloads
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