skip to main content
research-article

A Reconfigurable PLA Architecture for Nanomagnet Logic

Published:01 February 2012Publication History
Skip Abstract Section

Abstract

In order to continue the performance and scaling trends that we have come to expect from Moore’s Law, many emergent computational models, devices, and technologies are actively being studied to either replace or augment CMOS technology. Nanomagnet Logic (NML) is one such alternative. NML operates at room temperature, it has the potential for low power consumption, and it is CMOS compatible. In this aricle, we present an NML programmable logic array (PLA) based on a previously proposed reprogrammable quantum-dot cellular automata PLA design. We also discuss the fabrication and simulation validation of the circuit structures unique to the NML PLA, present area, energy, and delay estimates for the NML PLA, compare the area of NML PLAs to other reprogrammable nanotechnologies, and analyze how architectural-level redundancy will affect performance and defect tolerance in NML PLAs. We will use results from this study to shape a concluding discussion about, which architectures appear to be most suitable for NML.

References

  1. Alam, M. T., Siddiq, M. J., Bernstein, G. H., Niemier, M., Porod, W., and Hu, X. S. 2010. On-chip clocking for nanomagnet logic devices. IEEE Trans. Nanotechnol PP, 99, 1. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. Andre, T. W., Nahas, J. J., Subramanian, C. K., Garni, B. J., Lin, H. S., Omair, A., and Martino, W. K. 2005. A 4-mb 0.18-um 1T1MTJ toggle MRAM with balanced three input sensing scheme and locally mirrored unidirectional write drivers. IEEE J. Solid-State Circuits 40, 1, 301--309.Google ScholarGoogle ScholarCross RefCross Ref
  3. Behin-Aein, B., Salahuddin, S., and Datta, S. 2009. Switching energy of ferromagnetic logic bits. IEEE Trans. Nanotechnol. 8, 4, 505--514. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. Bernstein, G., Imre, A., Metlushko, V., Orlov, A., Zhou, L., Ji, L., Csaba, G., and Porod, W. 2005. Magnetic QCA systems. Microelectronics J. 36, 619--624.Google ScholarGoogle ScholarCross RefCross Ref
  5. Carlton, D., Emley, N., Tuchfeld, E., and Bokor, J. 2008. Simulation studies of nanomagnet-based architecture. NanoLetters 8, 12, 4173--4178.Google ScholarGoogle ScholarCross RefCross Ref
  6. Cong, J., Peck, J., and Ding, Y. 1996. RASP: A general logic synthesis system for SRAM-based FPGAs. In Proceedings of the ACM 4th International Symposium on Field Programmable Gate Arrays (FPGA). 137--143. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. Cowburn, R. and Welland, M. 2000. Room temperature magnetic quantum cellular automata. Science 287, 5457, 1466--1468.Google ScholarGoogle Scholar
  8. Crocker, M., Hu, X., and Niemier, M. 2007. Fault models and yield analysis for QCA-based PLAs. In Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). 435--440.Google ScholarGoogle Scholar
  9. Crocker, M., Hu, X. S., and Niemier, M. 2008a. Defect tolerance in QCA-based PLAs. In Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). 46--53. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. Crocker, M., Hu, X. S., Niemier, M., Yan, M., and Bernstein, G. 2008b. PLAs in quantum-dot cellular automata. IEEE Trans. Nanotechnol. 7, 3, 376--386. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. Crocker, M., Hu, X., and Niemier, M. 2009. Defects and faults in QCA-based PLAs. ACM J. Emerg. Technol. Comput. Syst. 5, 2, 1--27. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. Crocker, M., Hu, X. S., and Niemier, M. 2010. Design and comparison of NML systolic architectures. In Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. Csaba, G., Lugli, P., Csurgay, A., and Porod, W. 2005. Simulation of power gain and dissipation in field-coupled nanomagnet. J. Comp. Elec. 4, 1/2, 105--110.Google ScholarGoogle ScholarCross RefCross Ref
  14. Dehon, A. 2005. Nanowire-based programmable architectures. ACM J. Emerg. Technol. Comput. Syst. 1, 2, 109--162. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. Dingler, A., Niemier, M., Hu, X. S., Garrison, M., and Alam, M. T. 2009a. System-level energy and performance projections for nanomagnet-based logic. In Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). 21--26. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. Dingler, A., Siddiq, M., Niemier, M., Hu, X., Alam, M., Bernstein, G., and Porod, W. 2009b. Controlling magnetic circuits: How clock structure implementation will impact logical correctness and power. In Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. Donahue, M. and Porter, D. OOMMF User’s Guide, Version 1.0, Interagency Report NISTIR 6367.Google ScholarGoogle Scholar
  18. Gerrits, T., van den Berg, H., Hohlfeld, J., Bar, L., and Rasing, T. 2002. Ultrafast precessional magnetization reversal by picosecond magnetic field pulse shaping. Nature 418, 506--512.Google ScholarGoogle ScholarCross RefCross Ref
  19. Hu, X. S., Crocker, M., Niemier, M., Yan, M., and Bernstein, G. 2006. PLAs in quantum-dot cellular automata. In Proceedings of the IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI). Google ScholarGoogle ScholarDigital LibraryDigital Library
  20. Imre, A., Csaba, G., Ji, L., Orlov, A., Bernstein, G., and Porod, W. 2006. Majority logic gate for magnetic quantum-dot cellular automata. Science 311, 5758, 205--208.Google ScholarGoogle Scholar
  21. Liu, S., Hu, X. S., Nahas, J. J., Niemier, M., Porod, W., and Bernstein, G. H. 2010. Magnetic-electrical interface for nanomagnet logic. IEEE Trans. Nanotechnol. 10, 4, 757--763. Google ScholarGoogle ScholarDigital LibraryDigital Library
  22. Manem, H., Paliwoda, P. C., and Rose, G. S. 2008. A hybrid CMOS/nano FPGA architectire build from programmable majority logic arrays. In Proceedings of the Great Great Lakes Symposium on VLSI, 249--254. Google ScholarGoogle ScholarDigital LibraryDigital Library
  23. McVitie, S., White, G., Scott, J., Warin, P., and Chapman, J. 2001. Quantitative imaging of magnetic domain walls in thin films using Lorentz and magnetic force microscopies. J. Appl. Phys. 90, 10, 5220--5227.Google ScholarGoogle ScholarCross RefCross Ref
  24. Niemier, M., Alam, M., Hu, X., Bernstein, G., Porod, W., Putney, M., and DeAngelis, J. 2007. Clocking structures and power analysis for nanomagnet-based logic devices. In Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED). 26--31. Google ScholarGoogle ScholarDigital LibraryDigital Library
  25. Niemier, M., Crocker, M., and Hu, X. S. 2008a. Fabrication variations and defect tolerance for nanomagnet-based QCA. In Proceedings of the 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT). 534--542. Google ScholarGoogle ScholarDigital LibraryDigital Library
  26. Niemier, M., Dingler, A., and Hu, X. S. 2008b. Bridging the gap between nanomagnetic devices and circuits. In Proceedings of the 26th IEEE International Conference on Computer Design (ICDE). 506--513.Google ScholarGoogle Scholar
  27. Sentovich, E. M., Singh, K. J., Lavagno, L., Moon, C., Murgai, R., Saldanha, A., Savoj, H., Stephan, P. R., Brayton, R. K., and Sangiovanni-Vinventelli, A. 1992. SIS: A system for sequential circuit systhesis. Tech. rep. UBC/ERL M92/41, U.C. Berkeley.Google ScholarGoogle Scholar
  28. Snider, G. and Williams, R. S. 2007. Nano/CMOS architectures using a field-programmable nanowire interconnect. Nanotechnol. 18, 035204.Google ScholarGoogle ScholarCross RefCross Ref
  29. Strukov, D. B. and Likharev, K. K. 2006. A reconfigurable architecture for hybrid MOS/nanodevice circuit. Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA). 131--140. Google ScholarGoogle ScholarDigital LibraryDigital Library
  30. Varga, E., Niemier, M. T., Bernstein, G., Porod, W., and Hu, X. S. 2009. Non-volatile and reprogrammable MQCA-based majority gates. In Proceedings of the Device Research Conference.Google ScholarGoogle Scholar
  31. Varga, E., Liu, S., Niemier, M., Porod, W., Hu, X., Bernstein, G., Alam, M., and Orlov, A. 2010a. Experimental demonstration of fanout for nanomagnet logic. In Proceedings of the Device Research Conference.Google ScholarGoogle Scholar
  32. Varga, E., Siddiq, M., Niemier, M., Alam, M., Bernstein, G., Porod, W., Orlov, A., and Hu, X. 2010b. Experimental demonstration of non-majority, nanomagnet logic gates. In Proceedings of the Device Research Conference.Google ScholarGoogle Scholar
  33. Verma, L. and Ng, V. 2007. Magnetic domain patterns in a zigzag nanowire. J. Magnetism Magnetic Mater. 313, 2, 317--321.Google ScholarGoogle ScholarCross RefCross Ref

Index Terms

  1. A Reconfigurable PLA Architecture for Nanomagnet Logic

    Recommendations

    Comments

    Login options

    Check if you have access through your login credentials or your institution to get full access on this article.

    Sign in

    Full Access

    • Published in

      cover image ACM Journal on Emerging Technologies in Computing Systems
      ACM Journal on Emerging Technologies in Computing Systems  Volume 8, Issue 1
      February 2012
      124 pages
      ISSN:1550-4832
      EISSN:1550-4840
      DOI:10.1145/2093145
      Issue’s Table of Contents

      Copyright © 2012 ACM

      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

      Publisher

      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 1 February 2012
      • Accepted: 1 June 2011
      • Revised: 1 March 2011
      • Received: 1 August 2010
      Published in jetc Volume 8, Issue 1

      Permissions

      Request permissions about this article.

      Request Permissions

      Check for updates

      Qualifiers

      • research-article
      • Research
      • Refereed

    PDF Format

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader