Dipankar Majumdar
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Abstract
Finite State Automata have been extended in a number of ways with varied additional constraints with an objective of modeling varied real life problems. The current paper commonly refers to such extensions as constrained automata. It aims at defining a generic mathematical model for the constrained automata targeted towards interoperability and possible integration amongst them. The paper proposes and demonstrates usage of hyper complex symbols that realizes the objective.
- Rajeev Alur, David Dill, "A Theory of Timed Automata", Elsevier Journal of Theoretical Computer Science, 1994. Google Scholar
Digital Library
- Mark Utting, "Position Paper: Model-Based Testing", Proceedings of the Verified Software: Theories, Tools, Experiments (VSTTE-2005), Zurich, Switzerland.Google Scholar
- Bouyer, P. and Laroussinie, F. (2010) Model Checking Timed Automata, in Modeling and Verification of Real-Time Systems: Formalisms and Software Tools (Editors: S. Merz and N. Navet), ISTE, London, UK. DOI: 10.1002/9780470611012.ch4Google Scholar
- Dirk Beyer and Andreas Noack, "Efficient Verification of Timed Automata using BDDs", Proceedings of the 6th International ERCIM Workshop on Formal Methods for Industrial Critical Systems (FMICS 2001)Google Scholar
- Dang Van Hung, Miaomiao Zhang, On Verification of Probabilistic Timed Automata against Probabilistic Duration Properties, Proceedings of the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA '07) of IEEE Computer Society Washington, DC, USA 2007 Google ScholarDigital Library
- Peter Niebert, Moez Mahfoudh, Eugene Asarin, Marius Bozga, Oded Maler, Navendu Jain, "Verification of Timed Automata via Satisfiability Checking" Proceedings of the Formal Techniques in Real-Time and Fault-Tolerant Systems (FTRTFT 2002), pp: 225--244 Google ScholarDigital Library
- Wolfgang Prenninger and Alexander Pretschner, "Abstractions for Model-Based Testing", International Workshop on Test and Analysis of Component Based Systems, Barcelona, March 27-28, 2004, In Conjunction with ETAPS 2004Google Scholar
- Alexandre Petrenko, Sergiy Boroday, and Roland Groz "Confirming Configurations in EFSM Testing", IEEE Transactions in Software Engineering, Jan 2004 , Vol 30, No. 1, pp 29--42. Google ScholarDigital Library
- Rajeev Alur, T.A. Henzinger, "A really temporal logic", in Proc. 30th Annual IEEE Symposium Foundations of Computer Science, 1989, pp 164--169 Google ScholarDigital Library
- Rajeev Alur, T.A. Henzinger, "Real Time Logic: complexity and expressiveness", Information and Computation, vol 104, pp 35--77, 1993 Google ScholarDigital Library
- Handbook of Logic and Language, J. v. Benthem and A. T. Meulen, Eds, North-Holland, 1997 Google ScholarDigital Library
- Amir Pnueli, The temporal logic of programs. Proceedings of the 18th Annual Symposium on Foundations of Computer Science (FOCS), 1977, 46--57. doi:10.1109/SFCS.1977.32 Google ScholarDigital Library
- F. Wang, A.K. Mok, E.A. Emerson, "Real Time Distributed System Specification and Verification in APTL", ACM Transactions in Software Engineering and Methodologies, vol 2, no 4, pp 346--378, Oct 1993 Google ScholarDigital Library
- E.M. Clarke, E. A. Emerson, "Design and synthesis of synchronization skeletons using branching-time temporal logics", In Lecture Notes in Computer Science, Logic of Programs. Heidelburg, Germanny: Springer Verilag, 1981, vol. 131, pp 52--71 Google ScholarDigital Library
- E.M. Clarke, E. A. Emerson, A.P. Sistla, "Automatic Verification of Finite State Concurrent Systems using Temporal Logic Specifications", ACM Transactions in Program Language Systems, vol. 8, no. 2, pp 244--263, 1986. Google ScholarDigital Library
- E. A. Emerson, A.K. Mok, A.P. Sistla, J. Srinivasan "Quantitative Temporal Reasoning", Journal of Real Time Systems, vol. 4, no.. 4, pp 617--638, July 1997 Google ScholarDigital Library
- C. A. R. Hoare, Communicating Sequential Processes. Englewood Cliffs, NJ: Prentice-Hall, 1985. Google ScholarDigital Library
- A. Shaw, "Communicating real-time state machines," IEEE Trans.Software Eng., vol. 18, pp. 805--816, Sept. 1992. Google ScholarDigital Library
- S. J. Garland and N. A. Lynch, "The IOA language and toolset:Support for designing, analyzing, and building distributed systems," Massachusetts Inst. Technol., Cambridge, Tech. Rep. MIT/LCS/TR.Google Scholar
- D. K. Kaynar, N. A. Lynch, R. Segala, and F. W. Vaandrager, "Timed I/O automata: a mathematical framework for modeling and analyzing real-time systems," presented at the 24th Int. Real-Time Systems Symp., Cancun, Mexico, 2003. Full version: D. K. Kaynar, N. A. Lynch, R. Segala, and F.W. Vaandrager, "The theory of timed I/O automata, Massachusetts Inst. Technol. Lab. Comput. Sci., Cambridge, MA, Tech. Rep. MIT-LCS-TR-917. Google ScholarDigital Library
- N. Lynch and M. R. Tuttle, "An introduction to input/output automata," CWI-Q., vol. 2, no. 3, pp. 219--246, Sept. 1989Google Scholar
- J. Bengtsson, K. Larsen, F. Larsson, P. Pettersson, and W. Yi, "UPPAAL-a tool suite for automatic verification of real-time systems," in Lecture Notes in Computer Science, Hybrid Control Systems. Heidelberg, Germany: Springer-Verlag, 1996, vol. 1066, pp. 232--243. Google ScholarDigital Library
- P. Pettersson and K. G. Larsen, "UPPAAL2k," Bull. Eur. Assoc. Theor. Comput. Sci., vol. 70, pp. 40--44, 2000.Google Scholar
- P.-A. Hsiung and F.Wang, "User-friendly verification," presented at the 1999 IFIP TC6/WG6.1 Joint Int. Conf. Formal Description Techniques and Protocol Specification, Testing, and Verification, Beijing, China. Google ScholarDigital Library
- F. Wang and P.-A. Hsiung, "Automatic verification on the large," in Proc. 3rd IEEE High-Assurance Systems Engineering Symp., 1998, pp. 134--141. Google ScholarDigital Library
- F. Wang and P.-A. Hsiung, "Efficient and user-friendly verification," IEEE Trans. Comput., vol. 51, pp. 61--83, Jan. 2002. Google ScholarDigital Library
- C. Daws, A. Olivero, S. Tripakis, and S. Yovine, "The tool KRONOS," in Lecture Notes in Computer Science, Hybrid Systems. Heidelberg, Germany: Springer-Verlag, 1996, vol. 1066, pp. 208--219. Google ScholarDigital Library
- F. Wang , "Efficient data-structure for fully symbolic verification of real-time software systems," in Lecture Notes in Computer Science, Tools and Algorithms for the Construction and Analysis of Systems. Heidelberg, Germany: Springer-Verlag, 2000, vol. 1785, pp. 157--171. Google ScholarDigital Library
- F. Wang , RED: model-checker for timed automata with clockrestriction diagram," presented at the Workshop on Real-Time Tools, Aalborg, Denmark, 2001.Google Scholar
- F. Wang, "Symbolic verification of complex real-time systems with clock-restriction diagram," presented at the IFIP Int. Conf. Formal Techniques for Networked and Distributed Systems, Cheju Island, Korea, 2001. Google ScholarDigital Library
- F. Wang, "Efficient verification of timed automata with BDD-like data-structures," Int. J. Softw. Tools Technol. Transf. (Special Issue for VMCAI'2003). Preliminary version: Lecture Notes in Computer Science, Verification, Model Checking, and Abstract Interpretation. Heidelberg, Germany: Springer-Verlag, 2003, vol. 2575. Google ScholarDigital Library
- S. Yovine, "Kronos: A verification tool for real-time systems," Int. J. Softw. Tools Technol. Transf., vol. 1, no. 1/2, pp. 123--133, Oct 1997.Google ScholarDigital Library
- R. Alur, T. A. Henzinger, and P. H. Ho, "Automatic symbolic verification of embedded systems," IEEE Trans. Software Eng., vol. 22, pp. 181--201, Mar. 1996. Google ScholarDigital Library
- T. A. Henzinger, P. H. Ho, and H. Wong-Toi, "HyTech: a model checker for hybrid systems," Int. J. Softw. Tools Technol. Transf., vol. 1, pp. 110--122, 1997.Google ScholarDigital Library
- F. Jahanian, A. K. Mok, "Safety analysis of timing properties in real time systems", IEEE Transactions in Real Time Systems, vol. SE-12, pp 890--904. Sept 1986 Google ScholarDigital Library
- N. Shankar, "Verification of Real Time using PVS", in Lecture Notes in Computer Science, Computer Aided Verification. Heidelberg, Germany: Springer-Verilag, 1993, vol 697, pp 280--291 Google ScholarDigital Library
- M. J. C. Gordon, "HOL: a proof generating system for higher-order logic," in VLSI, Specification, Verification and Synthesis, G. Birthwistle, and P.A. Subramanium Eds. Norwood, MA: Kluwer 1988, pp 73--198Google Scholar
- L. C. Paulson, "Isabelle: the next 700 theorem provers", in Logic and Computer Science, P. Odifreddi, Ed. New York: Academic, 1990, pp. 361--386Google Scholar
- F. Wang, "Formal Verification of Timed Systems: A Survey and Perspective", in Proc of the IEEE, vol. 92, no. 8, Aug 2004, pp 1283--1305Google ScholarCross Ref
- J.E. Hopcroft, R. Motwani, J.D. Ullmann, "Introduction to Automata Theory, Languages, and Computation (2nd Edition)", Addison Wesley; Nov, 2000 Google ScholarDigital Library
- E. Mikk, Y. Lakhnech, M. Siegel, "Hierarchical Automata as Model for Statecharts (Extednded Abstract)".Google Scholar
- K. S. Trivedi, "Probability and Statistics with Reliability, Queuing and Computer Science Applications", Second Edition, John Wiley and Sons Inc New York, A Wiley-Interscience Publication, 2002 Google ScholarDigital Library
- A. S. Tanenbaum, Distributed Systems, Prentice Hall of India; 2nd edition 2007. Google ScholarDigital Library
- Francesco Catoni, Roberto Cannata, Vincenzo Catoni, Paolo Zampetti, "N Dimensional Geometries Generated by Hyper Complex Numbers", Advances in Applied Clifford Algebras 15 No. 1, 1--26 (2005)Google ScholarCross Ref
- E. Kreyszig, "Advanced Engineering Mathematics", Wiley; 10th Edition, August 2011.Google Scholar
Index Terms
- Interoperability of constrained finite state automata
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