Jawahar Jain
- 1.Berman C. L., Trevyllian L. H., "Functional Comparison of Logic Designs for VLSI Circuits", ICCAD, 1989, pp. 456-459.Google Scholar
- 2.Brand D., "Verification of Large Synthesized Designs", IC- CAD, 1993, pp. 534-537. Google ScholarDigital Library
- 3.Bryant R. E., "Graph-Based Algorithms for Boolean Function Manipulation", IEEE Trans. on Computers, vol. C-35, no. 8, Aug. 1986. Google ScholarDigital Library
- 4.Cerny E., Mauras C., "Tautology Checking Using Cross- Controllability and Cross- Observability Relations", ICCAD, 1990, pp. 34-38.Google Scholar
- 5.Entrena L., Cheng K-T., "Sequential Logic Optimization By Redundancy Addition And Removal", ICCAD, 1993, pp. 310- 315. Google ScholarDigital Library
- 6.Fujita M., Fujisawa H., Kawato N., "Evaluation and Improvements of Boolean Comparison Method Based on Binary Decision Diagrams", ICCAD, 1988, pp. 2-5.Google Scholar
- 7.Kunz W., Pradhan D. K., "Recursive Learning: An Attractive Alternative to the Decision Tree for Test Generation in Digital Circuits", Int. Test Conf., pp. 816-825, 1992. Google ScholarDigital Library
- 8.Kunz W., "HANNIBAL: An Efficient Tool for Logic Verification Based on Recursive Learning", ICCAD 1993, pp. 538-543. Google ScholarDigital Library
- 9.Malik S. et al., "Logic Verification using Binary Decision Diagrams in a Logic Synthesis Environment", ICCAD, 1988, pp. 6-9.Google ScholarCross Ref
- 10.Mukherjee R., Jain J., Pradhan D. K., "Functional Learning: A new approach to learning in digital circuits", IEEE VLSI Test Symp., pp. 122-127, April 1994.Google ScholarCross Ref
- 11.Mukherjee R., Jain J., Fujita M., "VERIFUL : VERification using FUnctional Learning", European Design and Test Conf., March 1995, pp. 444-448. Google ScholarDigital Library
- 12.Jain J., Mukherjee R., Fujita M., "Verification Techniques Based on Functional Learning", Technical Report No. FLA- CPS95-01, Fujitsu Laboratories of America, 1995.Google Scholar
- 13.Rudell R., "Dynamic Variable Ordering for Ordered Binary Decision Diagrams", ICCAD, 1993, pp. 42-47. Google ScholarDigital Library
- 14.Schulz M., Trischler E., Safert T., "SOCRATES: A highly efficient automatic test pattern generation system", IEEE Trans. on CAD, vol. 7, Jan. 1988, pp. 126-137.Google ScholarDigital Library
- 15.Shiple T. R., Hojati R., Sangiovanni-Vincentelli A., Brayton R. K., "Heuristic minimization of BDDs using don't cares", DAC, 1994, pp. 225-231. Google ScholarDigital Library
Index Terms
- Advanced verification techniques based on learning
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