Andrew B. Kahng
Seokhyeong Kang
ABSTRACT
Approximation can increase performance or reduce power consumption with a simplified or inaccurate circuit in application contexts where strict requirements are relaxed. For applications related to human senses, approximate arithmetic can be used to generate sufficient results rather than absolutely accurate results. Approximate design exploits a tradeoff of accuracy in computation versus performance and power. However, required accuracy varies according to applications, and 100% accurate results are still required in some situations. In this paper, we propose an accuracy-configurable approximate (ACA) adder for which the accuracy of results is configurable <u>during runtime.</u> Because of its configurability, the ACA adder can adaptively operate in both approximate (inaccurate) mode and accurate mode. The proposed adder can achieve significant throughput improvement and total power reduction over conventional adder designs. It can be used in accuracy-configurable applications, and improves the achievable tradeoff between performance/power and quality. The ACA adder achieves approximately 30% power reduction versus the conventional pipelined adder at the relaxed accuracy requirement.
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Index Terms
- Accuracy-configurable adder for approximate arithmetic designs
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Reviews
Jiawei Huang
This paper introduces a new accuracy-configurable approximate (ACA) adder that can be configured during runtime. In the past, various approximate adders have been proposed for error-tolerant applications. Compared to conventional adders, these adders have lower implementation and operating costs, with negligible impact on application fidelity. However, most of these adders can only produce approximate results and are thus useless in error-intolerant applications. ACA adders, however, can be deployed in any application, regardless of accuracy requirements, even if the requirement is time-varying. The basic idea of achieving this runtime reconfigurability is the separation of approximate computation and error correction. In the approximate computation stage, the adder is partitioned into smaller sub-adders and their outputs are joined to form the approximate sum. This stage can be performed much faster than conventional addition, but errors can arise when the inputs trigger long carry propagation. The optional error correction stage detects the error and increments the sum to compensate for the error. In a pipelined implementation, the error correction can span multiple cycles to achieve incremental correction. By activating different numbers of correction stages, the authors achieve runtime accuracy power reconfigurability. The paper is weaker in its presentation of case studies. First, the indication of ACCamp and ACCinf (accuracy metrics) at the application level is unclear. Second, the power savings largely depend on the availability of ACCamp and ACCinf profiles for the tested applications. Generating these profiles is time-consuming, but without these profiles it is hard to choose an operating mode for the ACA adder. Overall, this well-written paper addresses a crucial problem from previous literature. The proposed adder will find very wide application, especially in mobile devices such as smartphones and tablets. These devices often undertake communication and signal processing tasks with varying levels of quality requirements (for example, a voice call can tolerate more noise than music playback). Accuracy configurability allows the power manager of the device to save power when the quality requirement is low, and produce high-quality signals when needed. Online Computing Reviews Service
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