James Dundas
Trevor Mudge
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Digital Library
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- 15.J. Dundas and T. Mudge, "Using Stall Cycles to improve Microprocessor Performance," University of Michigan Department of Electrical Engineering and Computer Science Technical Report CSE-TR-301-96, September 1996.Google Scholar
Index Terms
- Improving data cache performance by pre-executing instructions under a cache miss
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Author retrospective improving data cache performance by pre-executing instructions under a cache miss
ACM International Conference on Supercomputing 25th Anniversary VolumeThe paper introduces and evaluates a technique, referred to as runahead, that prefetches instructions and data into the L1 caches on cache misses. The results of the experiments reported in the paper show that the CPI of a simple in-order pipeline could ...
Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers
Special Issue: Proceedings of the 17th annual international symposium on Computer ArchitectureProjections of computer technology forecast processors with peak performance of 1,000 MIPS in the relatively near future. These processors could easily lose half or more of their performance in the memory hierarchy if the hierarchy design is based on ...
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