skip to main content
10.1145/2660540.2660991acmconferencesArticle/Chapter ViewAbstractPublication PagessbcciConference Proceedingsconference-collections
tutorial

Sub-1 V Supply Nano-Watt MOSFET-Only Threshold Voltage Extractor Circuit

Authors Info & Claims
Published:01 September 2014Publication History

ABSTRACT

This work presents a self-biased MOSFET threshold voltage VT0 extractor circuit. Its working principle is based on a current-voltage relationship derived from a continuous physical model. The model is valid for any operating condition, from weak to strong inversion, and under triode or saturation regimes. The circuit is MOSFET-only (can be implemented in any standard digital process), and it operates with a power supply of less than 1 V, consuming tenths of nW. Post-layout simulation results show that the extracted VT0 has an error inferior to 1.3%, when compared to the theoretical value, for a -40 to 125°C temperature range. We present variability results from Monte Carlo simulations that support the extracting behavior of the circuit with good accuracy. The occupied silicon area is 0.0076 mm2 in a 0.13μm CMOS process.

References

  1. A. Ortiz-Conde, F. G. Sanchez, J. Liou, A. Cerdeira, M. Estrada, and Y. Yue, "A review of recent {MOSFET} threshold voltage extraction methods," Microelectronics Reliability, vol. 42, no. 4âĂŞ5, pp. 583--596, 2002.Google ScholarGoogle Scholar
  2. Z. Wang, "Automatic vt extractors based on an n times;n2 mos transistor array and their application," Solid-State Circuits, IEEE Journal of, vol. 27, no. 9, pp. 1277--1285, Sep 1992.Google ScholarGoogle ScholarCross RefCross Ref
  3. M. Johnson, "An input-free vt extractor circuit using a two-transistor differential amplifier," Solid-State Circuits, IEEE Journal of, vol. 28, no. 6, pp. 704--705, Jun 1993.Google ScholarGoogle ScholarCross RefCross Ref
  4. U. Cilingiroglu and S. K. Hoon, "An optimally self-biased threshold-voltage extractor {mosfet circuit parametric testing}," Instrumentation and Measurement, IEEE Transactions on, vol. 52, no. 5, pp. 1528--1532, Oct 2003.Google ScholarGoogle ScholarCross RefCross Ref
  5. G. Fikos and S. Siskos, "Low-voltage low-power accurate cmos vt extractor," Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol. 48, no. 6, pp. 626--628, Jun 2001.Google ScholarGoogle ScholarCross RefCross Ref
  6. S. Vlassis and C. Psychalinos, "Low-voltage cmos vt extractor," Electronics Letters, vol. 43, no. 17, pp. 921--923, August 2007.Google ScholarGoogle ScholarCross RefCross Ref
  7. O. F. Siebel, M. C. Schneider, and C. Galup-Montoro, "{MOSFET} threshold voltage: Definition, extraction, and some applications," Microelectronics Journal, vol. 43, no. 5, pp. 329--336, 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. A. Cunha, M. Schneider, and C. Galup-Montoro, "An mos transistor model for analog circuit design," Solid-State Circuits, IEEE Journal of, vol. 33, no. 10, pp. 1510--1519, 1998.Google ScholarGoogle ScholarCross RefCross Ref
  9. E. Camacho-Galeano, C. Galup-Montoro, and M. Schneider, "A 2-nw 1.1-v self-biased current reference in cmos technology," Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 52, no. 2, pp. 61--65, Feb 2005.Google ScholarGoogle ScholarCross RefCross Ref
  10. E. Vittoz and J. Fellrath, "Cmos analog integrated circuits based on weak inversion operations," Solid-State Circuits, IEEE Journal of, vol. 12, no. 3, pp. 224--231, 1977.Google ScholarGoogle ScholarCross RefCross Ref
  11. G.-M. C. Rossi, C. and M. C. Schneider, "Ptat voltage generator based on an mos voltage divider," in NSTI Nanotech, vol. 3, 2007, pp. 625--628.Google ScholarGoogle Scholar
  12. M. Pelgrom, A. C. J. Duinmaijer, and A. Welbers, "Matching properties of mos transistors," Solid-State Circuits, IEEE Journal of, vol. 24, no. 5, pp. 1433--1439, Oct 1989.Google ScholarGoogle ScholarCross RefCross Ref

Index Terms

  1. Sub-1 V Supply Nano-Watt MOSFET-Only Threshold Voltage Extractor Circuit

    Recommendations

    Comments

    Login options

    Check if you have access through your login credentials or your institution to get full access on this article.

    Sign in
    • Published in

      cover image ACM Conferences
      SBCCI '14: Proceedings of the 27th Symposium on Integrated Circuits and Systems Design
      September 2014
      286 pages
      ISBN:9781450331562
      DOI:10.1145/2660540

      Copyright © 2014 ACM

      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

      Publisher

      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 1 September 2014

      Permissions

      Request permissions about this article.

      Request Permissions

      Check for updates

      Qualifiers

      • tutorial
      • Research
      • Refereed limited

      Acceptance Rates

      SBCCI '14 Paper Acceptance Rate40of130submissions,31%Overall Acceptance Rate133of347submissions,38%

    PDF Format

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader