- 1.Adams, D. A. A C~ueaCion Model With Data FIow Se- ~. Technical Reporc CS 117, Compucer Science Department, School Of HuDanlCies and Sciences, SCanfard University, SCanford, Calif., December 1968.Google Scholar
- 2.Bihrr, A. Operation patterns (An extensible model of an extensible language). Svnmosium on Theoretical Rograpmfnq, Novosibirsk, USSR August 1972 Reprint). Google ScholarDigital Library
- 3.Dennis, J. B. Programming generali iT, parallelism and computer architecture. Information Processi~ 68, Notch-Holland Publiahins Co., Amsterdam 1969, 484-492.Google Scholar
- 4.Dennis, J. B. First version of a data floe procedure language. Symposium on ProgTamming, InsCiCuC de ProgrammaCion,UniversttT of Paris, Paris, France, April 1974, 241-271. Google ScholarDigital Library
- 5.Dermis, J. B., and J. B. Fosseen. Introduction t~o Data Flow Schemas. November 1973 (submitted for publication).Google Scholar
- 6.Dennis, J. B., and D. P. Misunas. A computer architecture for highly parallel signal processing. Proceedings of the ACH 1974 NaCionall Conference, AC~I, New York, November 1974.Google ScholarDigital Library
- 7.Dennis, J. B., and D. P. ldisunas. The design of a Highly Parallel Computer for Signal Processing ApplicaClons-; C~npucaclou Structures Croup Memo 101, Project MAC, M.I.T., Cambridge, Man., July 1974.Google Scholar
- 8.Karp, R. M., and R. E. Hiller. Properties of a model for parallel eompucacions: determinacy, Cermlrmtion, queueing. SIAM J. Appl. Math. 14 (November 1966), 1390-1411.Google ScholarCross Ref
- 9.Kosinski, P. R. A Data Flow Programming language. Report RC 4264, IBM T. J. Watson Research CanCer, Yorkcotm Heighcs, N. Y., March 1973.Google Scholar
- 10.Koslnskl, P. R. A data ~1ow language for operaclng systems programming. Proceedings of ACM/ Sigplan-Sigops Interface MeetlnK, SIGPLAN Notices 8, 9 (September 1973), 89-94. Google ScholarDigital Library
- 11.Rodriguez, J. E. A Graph Model for Parallel computation. Report 111-64, Project MAC, M.I.T., Cambridge, Mass., September 1969. Google ScholarDigital Library
Index Terms
- A preliminary architecture for a basic data-flow processor
Recommendations
A preliminary architecture for a basic data-flow processor
A processor is described which can achieve highly parallel execution of programs represented in data-flow form. The language implemented incorporates conditional and iteration mechanisms, and the processor is a step toward a practical data-flow ...
A preliminary architecture for a basic data-flow processor
ISCA '75: Proceedings of the 2nd annual symposium on Computer architectureA processor is described which can achieve highly parallel execution of programs represented in data-flow form. The language implemented incorporates conditional and iteration mechanisms, and the processor is a step toward a practical data-flow ...
The RISC processor DMN-6: a unified data-control flow architecture
This work presents an academic RISC processor architecture, named DMN-6 that executes every instruction in the datapath. It concentrates all the movement, branch and alu instructions in the arithmetic-logic unit. The idea is to normalize the control ...
Comments