skip to main content
10.1145/309847.310004acmconferencesArticle/Chapter ViewAbstractPublication PagesdacConference Proceedingsconference-collections
Article
Free Access

Microprocessor based testing for core-based system on chip

Authors Info & Claims
Published:01 June 1999Publication History
First page image

References

  1. 1.F.P.M. Beenker, R.G. Bennetts and A.P. Thijssen, "Testability Concepts for Digital ICs, The Macro Teat Approach," Kluwer Acad. Publishers, 1995.Google ScholarGoogle Scholar
  2. 2.L. Whetsel, "An IEEE 1149.1 Based Test Architecture for ICs with Embedded IP Cores," lnter~. Test Conf. (ITC-97), Nov. 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. 3.K. De, "Test methodology for embedded cores which protects intellectual property," VLS! Test Slim. (VTS-97), pp. 2-9, May 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. 4.It. Chandramouli and S. Pateras, "Testing Systems on a Chip," IEEE Spectrum, pp. 42-47, Nov. 1996. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. 5.I. Ghosh, N. Jha and S. Day "A Low Overhead Design for Testability and Test Generation Technique for Core-Based Systems" lngern. Test Conf. (1TC- 97), Nov. 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. 6.V. Immaneni and S. Raman, "Direct Access Teat Scheme - Design of Block and Core Cells for Embedded ASICs," Intern. Test Conf. (ITC-90), pp. 488- 492, Oct. 1990.Google ScholarGoogle Scholar
  7. 7.M. Nourani and C. Papachristou, "Parallelism in Structural Fault Testing of Embedded Cores," 16th VLSI Test Sym. (VTS-98), pp. 15-20, April 1998. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. 8.N. Touba and B. Pouya, "Testing embedded cores using partial isolation rings," VLSI Test Syrn. (VTS-97), pp. 1016, May 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. 9.N. Touba and B. Pouya, "Modifying User-deflned Logic for Test Access to Embedded Cores," Intern. Test Conf. (ITC-97), Nov. 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. 10."VSI Alliance", Architecture Document, Version 1.0, 1997.Google ScholarGoogle Scholar
  11. 11.A.J. van de Goor and Th. J. Verhallen, "Functional Testing of Current Microprocessors," Intern. Test Coa}eren~e (ITC-92), pp. 684-695, Sept. 1992. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. 12.J. Aerts and E. J. Marinissen, "Scan Chain Design for Teat Time Reduction in Core-Based ICs," Intern. Test Conference (ITC-98), Oct. 1998. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. Microprocessor based testing for core-based system on chip

      Recommendations

      Comments

      Login options

      Check if you have access through your login credentials or your institution to get full access on this article.

      Sign in
      • Published in

        cover image ACM Conferences
        DAC '99: Proceedings of the 36th annual ACM/IEEE Design Automation Conference
        June 1999
        1000 pages
        ISBN:1581131097
        DOI:10.1145/309847

        Copyright © 1999 ACM

        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 1 June 1999

        Permissions

        Request permissions about this article.

        Request Permissions

        Check for updates

        Qualifiers

        • Article

        Acceptance Rates

        DAC '99 Paper Acceptance Rate154of451submissions,34%Overall Acceptance Rate1,770of5,499submissions,32%

        Upcoming Conference

        DAC '24
        61st ACM/IEEE Design Automation Conference
        June 23 - 27, 2024
        San Francisco , CA , USA

      PDF Format

      View or Download as a PDF file.

      PDF

      eReader

      View online with eReader.

      eReader