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An FPGA-Based Hardware Accelerator for K-Nearest Neighbor Classification for Machine Learning on Mobile Devices

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Published:20 June 2018Publication History

ABSTRACT

Machine learning has become one of the cornerstones of information technology. Many machine learning algorithms have found their way into mobile devices, which have stringent requirements. Also, machine learning algorithms, such as classification and clustering, are becoming complex, requiring high processing power, thus affecting the speedup. In this paper, we introduce unique, novel, and efficient hardware architecture to accelerate the K-nearest neighbor classifier on mobile devices, considering constraints associated with these devices. We evaluate the efficiency of our hardware architecture, in terms of speedup, space, and accuracy. Our design is generic, parameterized, and scalable. Our hardware design achieves 127 times speedup compared to its software counterpart, and can also achieve 100% classification accuracy.

References

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  • Published in

    cover image ACM Other conferences
    HEART '18: Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies
    June 2018
    125 pages
    ISBN:9781450365420
    DOI:10.1145/3241793

    Copyright © 2018 ACM

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    • Published: 20 June 2018

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    Acceptance Rates

    Overall Acceptance Rate22of50submissions,44%

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