ABSTRACT
Due to technology and power limitations, general-purpose processing units are experiencing progressively smaller performance gains. Computer architecture innovations are essential to keep performance steadily increasing. Thus domain-specific accelerators are receiving renewed interest and have shown to benefit different scientific and machine learning applications [1, 3]. High-Level-Synthesis (HLS) provides a way to quickly generate hardware descriptions for domain-specific accelerators starting from high-level applications. However, state-of-the-art tools typically require the application to be manually translated to C/C++ and carefully annotated to improve final design performance. This cumbersome process prevents scientists and researchers from tapping into the power of HLS, as many of their applications require significant effort to be ported.
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Index Terms
- SODA-OPT an MLIR based flow for co-design and high-level synthesis
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