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Layout impact of resolution enhancement techniques: impediment or opportunity?

Published:06 April 2003Publication History

ABSTRACT

This tutorial introduces the reader to the basic concepts of optical lithography, derives fundamental resolution limits, reviews the challenges facing future technology nodes, explains the principles of resolution enhancement techniques and their impact on chip layout, and discusses layout optimization considerations.

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  1. Layout impact of resolution enhancement techniques: impediment or opportunity?

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    • Published in

      cover image ACM Conferences
      ISPD '03: Proceedings of the 2003 international symposium on Physical design
      April 2003
      218 pages
      ISBN:1581136501
      DOI:10.1145/640000

      Copyright © 2003 ACM

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      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 6 April 2003

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      Overall Acceptance Rate62of172submissions,36%

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