A. Elkateeb
- 1. J. Hennessy, "VLSI processor architecture", IEEE Transactions on computer, vol. C-33, no. 12, pp. 1221-1246. December 1984.Google Scholar
- 2. M. Katevenls, "Reduced Instruction Set Computer Architecture for VLSI", MIT press, England 1985. Google ScholarDigital Library
- 3. M. Huguet & T. Lang, "A reduced register file for RISC architecture", Computer arch. news, vol. 13, no. 4, pp. 22-31. September 1985. Google ScholarDigital Library
- 4. A. Elkateeb, C. Phan & T. Le-Ngoc, "Performance evaluation of ISDN functions in real-time multi-tasking operation system environment", submitted to the Computer network and ISDN journal.Google Scholar
- 5. A. Elkateed & T. Le-Ngoc, "Pre-select priority strategy for real-time multi-tasking software", Technical report submitted to the department of Electrical Eng., Concordia university. March 1989.Google Scholar
Index Terms
- A priority strategy on RISC for real-time multitasking software applications
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