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Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads

Published:10 November 2002Publication History

ABSTRACT

Dynamic voltage scaling (DVS) reduces the power consumption of processors when peak performance is unnecessary. However, the achievable power savings by DVS alone is becoming limited as leakage power increases. In this paper, we show how the simultaneous use of adaptive body biasing (ABB) and DVS can be used to reduce power in high-performance processors. Analytical models of the leakage current, dynamic power, and frequency as functions of supply voltage and body bias are derived and verified with SPICE simulation. We then show how to determine the correct trade-off between supply voltage and body bias for a given clock frequency and duration of operation. The usefulness of our approach is evaluated on real workloads obtained using real-time monitoring of processor utilization for four applications. The results demonstrate that application of simultaneous DVS and ABB results in an average energy reduction of 48% over DVS alone.

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  1. Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads

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          cover image ACM Conferences
          ICCAD '02: Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
          November 2002
          793 pages
          ISBN:0780376072
          DOI:10.1145/774572

          Copyright © 2002 ACM

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          Publication History

          • Published: 10 November 2002

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