Abstract
We describe a multiprocessor system that attempts to enhance the system performance by incorporating into its architecture a number of key operating system concepts. In particular:
— the scheduling and synchronization of concurrent activities are built in at the hardware level,
— the interprocess communication functions are performed in hardware, and,
— a coupling between the scheduling and communication functions is provided which allows efficient implementation of parallel systems that is precluded when the scheduling and communication functions are realized in software.
- 1 Arvind, and V. Kàthail, "A Multiple Processor Data Flow Machine that supports generalized procedures," 8th Annual Symposium on Computer Architecture, 1981, pp. 291-302. Google ScholarDigital Library
- 2 A. Asthana, C. S. Roberts and G. K. Swanson, "Design of a Communications Kernel for Loosely Coupled Multiprocessors," Proc. 19th Annual Allerton Conference on Communication, Control and Computing, 1981.Google Scholar
- 3 D. R. Cheriton, et.al., "Thoth: A Portable Real-Time Operating System," CACM 22, 2, Feb. 1979, pp. 105-115. Google ScholarDigital Library
- 4 E.J. Dijkstra, "Cooperating Sequential Processes," Programming Languages (F. Genuys, ed.), Academic Press, New York, 1968.Google Scholar
- 5 J. B. Dennis, "Data Flow Super Computers," Computer, 13, 12, Dec 1980, pp. 48-56.Google ScholarDigital Library
- 6 D. R. Ditzel, "Reflections on the High-Level Language Symbol Computer System," Computer, 14, 7, July 1981, pp. 55-67.Google ScholarDigital Library
- 7 C. A. R. Hoare, "Communicating Sequential Processes," CACM, 21, 8, Aug. 1978, pp. 666-677. Google ScholarDigital Library
- 8 R. Rice, "The Chief Architect's Reflection on Symbol IIR," Computer, 14, 7, July 1981, pp. 41-55.Google ScholarDigital Library
- 9 A. J. Smith, "Multiprocessor Memory Organization and Memory Interference," CACM, 20, 10, Oct. 1977. Google ScholarDigital Library
- 10 R. J. Swan, S. H. Fuller and D. P. Siewiorek, "Cm* - a modular Multiprocessor," Proc. AFIPS Press, Arlington, Va. 1977, pp. 637-644.Google Scholar
- 11 S. Ward, C. Terman, J. Sieber, and R. McLellan, "NU: The LCS Advanced Node," MIT report, 1979.Google Scholar
- 12 W. W. Clipsham, F. E. Glave and M. L. Narraway, "Datapac Network Overview," Proc. ICCC, August 1976, pp. 131-136.Google Scholar
Index Terms
- A multi-microprocessor architecture with hardware support for communication and scheduling
Recommendations
A multi-microprocessor architecture with hardware support for communication and scheduling
ASPLOS I: Proceedings of the first international symposium on Architectural support for programming languages and operating systemsWe describe a multiprocessor system that attempts to enhance the system performance by incorporating into its architecture a number of key operating system concepts. In particular:
— the scheduling and synchronization of concurrent activities are built ...
A multi-microprocessor architecture with hardware support for communication and scheduling
We describe a multiprocessor system that attempts to enhance the system performance by incorporating into its architecture a number of key operating system concepts. In particular:
— the scheduling and synchronization of concurrent activities are built ...
Comments