skip to main content
article
Free Access

A multi-microprocessor architecture with hardware support for communication and scheduling

Published:01 March 1982Publication History
Skip Abstract Section

Abstract

We describe a multiprocessor system that attempts to enhance the system performance by incorporating into its architecture a number of key operating system concepts. In particular:

— the scheduling and synchronization of concurrent activities are built in at the hardware level,

— the interprocess communication functions are performed in hardware, and,

— a coupling between the scheduling and communication functions is provided which allows efficient implementation of parallel systems that is precluded when the scheduling and communication functions are realized in software.

References

  1. 1 Arvind, and V. Kàthail, "A Multiple Processor Data Flow Machine that supports generalized procedures," 8th Annual Symposium on Computer Architecture, 1981, pp. 291-302. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. 2 A. Asthana, C. S. Roberts and G. K. Swanson, "Design of a Communications Kernel for Loosely Coupled Multiprocessors," Proc. 19th Annual Allerton Conference on Communication, Control and Computing, 1981.Google ScholarGoogle Scholar
  3. 3 D. R. Cheriton, et.al., "Thoth: A Portable Real-Time Operating System," CACM 22, 2, Feb. 1979, pp. 105-115. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. 4 E.J. Dijkstra, "Cooperating Sequential Processes," Programming Languages (F. Genuys, ed.), Academic Press, New York, 1968.Google ScholarGoogle Scholar
  5. 5 J. B. Dennis, "Data Flow Super Computers," Computer, 13, 12, Dec 1980, pp. 48-56.Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. 6 D. R. Ditzel, "Reflections on the High-Level Language Symbol Computer System," Computer, 14, 7, July 1981, pp. 55-67.Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. 7 C. A. R. Hoare, "Communicating Sequential Processes," CACM, 21, 8, Aug. 1978, pp. 666-677. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. 8 R. Rice, "The Chief Architect's Reflection on Symbol IIR," Computer, 14, 7, July 1981, pp. 41-55.Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. 9 A. J. Smith, "Multiprocessor Memory Organization and Memory Interference," CACM, 20, 10, Oct. 1977. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. 10 R. J. Swan, S. H. Fuller and D. P. Siewiorek, "Cm* - a modular Multiprocessor," Proc. AFIPS Press, Arlington, Va. 1977, pp. 637-644.Google ScholarGoogle Scholar
  11. 11 S. Ward, C. Terman, J. Sieber, and R. McLellan, "NU: The LCS Advanced Node," MIT report, 1979.Google ScholarGoogle Scholar
  12. 12 W. W. Clipsham, F. E. Glave and M. L. Narraway, "Datapac Network Overview," Proc. ICCC, August 1976, pp. 131-136.Google ScholarGoogle Scholar

Index Terms

  1. A multi-microprocessor architecture with hardware support for communication and scheduling

          Recommendations

          Comments

          Login options

          Check if you have access through your login credentials or your institution to get full access on this article.

          Sign in

          Full Access

          • Published in

            cover image ACM SIGPLAN Notices
            ACM SIGPLAN Notices  Volume 17, Issue 4
            Proceedings of the 1982 symposium on Architectural support for programming languages and operating systems
            April 1982
            209 pages
            ISSN:0362-1340
            EISSN:1558-1160
            DOI:10.1145/960120
            Issue’s Table of Contents
            • cover image ACM Conferences
              ASPLOS I: Proceedings of the first international symposium on Architectural support for programming languages and operating systems
              March 1982
              209 pages
              ISBN:0897910664
              DOI:10.1145/800050

            Copyright © 1982 ACM

            Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

            Publisher

            Association for Computing Machinery

            New York, NY, United States

            Publication History

            • Published: 1 March 1982

            Check for updates

            Qualifiers

            • article

          PDF Format

          View or Download as a PDF file.

          PDF

          eReader

          View online with eReader.

          eReader