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MIXS: A mixed level simulator for large digital system logic verification

Published:23 June 1980Publication History

ABSTRACT

A mixed level simulator, MIXS, is a logic verification tool which has multiple simulation capabilities. Main MIXS techniques are time wheel and selective trace algorithm for functional level simulation based on 'node' model concept and the linkage function of functional models, described in different detail, with network information. The mixed level simulation for large digital systems can be achieved very efficiently by using the above techniques.

References

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  3. 3.S. G. Chappell, P. R. Menon, J. F. Pellegrin and A. M. Schowe,"Functional Simulation in the LAMP system" 13th Design Automation Conference Proceeding, pp. 42-47, 1976. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. 4.P. Wilcox "Digital logic simulation at the gate and functional level" 16th Design Automation Conference Proceeding, pp. 242-248, 1979. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. 5.William vanCleemput, et. al., "SABLE: A Tool for generating structured, multi-level simulation" 16th Design Automation Conference Proceeding, pp. 272-279, 1979. Google ScholarGoogle ScholarDigital LibraryDigital Library
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        cover image ACM Conferences
        DAC '80: Proceedings of the 17th Design Automation Conference
        June 1980
        642 pages

        Copyright © 1980 ACM

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        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 23 June 1980

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