Abstract
Systems-on-Chips often contain a large amount of embedded memory. In order to obtain sufficiently high yield, efficient diagnosis and repair facilities are needed for the memories. A novel and efficient approach for collecting complete failure data during on-chip memory testing is proposed that can be combined with a row/column reconfiguration algorithm for complete on-chip memory repair. A sequence of diagnostic tests of linear order is utilized that detects and localizes all cells involved in single-cell faults and two-cell coupling faults, such as idempotent coupling faults, and provides this information to on-chip circuitry for memory repair. Failure data are collected at the operating speed of the memory-under-test so that tests can be applied at speed. The data acquisition circuitry evaluates the test results and classifies faults as column failures, coupling faults, or single-cell faults for near-optimal allocation of spare resources. The proposed test and data acquisition algorithm can be realized as compact Built-In Self-Test (BIST) circuitry using standard design libraries.
- Bergfeld, T. J., Niggemeyer, D., and Rudnick, E. M. 2000. Diagnostic testing of embedded memories using BIST. In Proceedings of the Design Automation and Test in Europe Conference. 305--309. Google ScholarDigital Library
- Bhavsar, D. K. 1999. An algorithm for row-column self-repair of RAMs and its implementation in the Alpha 21264. In Proceedings of the IEEE International Test Conference. IEEE Computer Society Press, Los Alamitos, Calif., 311--318. Google ScholarDigital Library
- Chang, M.-F., Fuchs, W. K., and Patel, J. H. 1989. Diagnosis and repair of memory with coupling faults. IEEE Trans. Comput. 38, 4, 493--500. Google ScholarDigital Library
- Dekker, R., Beenker, F., and Koomen, J. 1988. Fault modeling and test algorithm development for static random access memories: Theory and practice. In Proceedings of the IEEE International Test Conference. IEEE Computer Society Press, Los Alamitos, Calif., 343--352.Google Scholar
- Dreielbis, J., Barth, J., Kalter, H., and Kho, R. 1998. Processor-based built-in self-test for embedded DRAM. IEEE J. Solid-State Circ. 33, 11, 1731--1740.Google ScholarCross Ref
- Kawagoe, T., Ohtani, J., Niiro, M., Ooisih, T., Hamada, M., and Hidaka, H. 2000. A built-in self-repair analyzer (CRESTA) for embedded DRAMs. In Proceedings of the IEEE VLSI Test Symposium. IEEE Computer Society Press, Los Alamitos, Calif., 567--573. Google ScholarDigital Library
- Kim, I., Zorian, Y., Komoriya, G., Pham, H., Higgins, F. P., and Lewandowski, J. L. 1998a. Built-in self-repair for embedded high-density SRAM. In Proceedings of the IEEE International Test Conference. IEEE Computer Society Press, Los Alamitos, Calif., 1112--1119. Google ScholarDigital Library
- Kim, K., Hwang, C.-G., and Lee, J. G. 1998b. DRAM technology perspective for gigabit era. IEEE Trans. Elect. Dev. 45, 3, 598--608.Google ScholarCross Ref
- Kim, V.-K. and Chen, T. 1997. SRAM yield estimation in the early stage of the design cycle. In Records of the IEEE International Workshop on Memory Technology, Design, and Testing. IEEE Computer Society Press, Los Alamitos, Calif., 21--26. Google ScholarDigital Library
- Mazumder, P. and Patel, J. H. 1987. An efficient built-in self-testing for random access memories. In Proceedings of the IEEE International Test Conference. IEEE Computer Society Press, Los Alamitos, Calif., 1072--1077.Google Scholar
- Nakahara, S., Higeta, K., Kohno, M., Kawamura, T., and Kakitani, K. 1999. Built-in self-test for GHz embedded SRAMs using flexible pattern generator and new repair algorithm. In Proceedings of the IEEE International Test Conference. IEEE Computer Society Press, Los Alamitos, Calif., 301--310. Google ScholarDigital Library
- Niggemeyer, D. 2002. Generation of diagnostic memory tests and on-chip test application with special consideration of embedded memories in systems-on-chips. Ph.D. dissertation, University of Hanover.Google Scholar
- Niggemeyer, D. and Rudnick, E. M. 2001. Automatic generation of diagnostic march tests. In Proceedings of the IEEE VLSI Test Symposium. IEEE Computer Society Press, Los Alamitos, Calif., 299--304. Google ScholarDigital Library
- Schanstra, I., Lukita, D., van de Goor, A. J., Veelenturf, K., and van Wijnen, P. J. 1998. Semiconductor manufacturing process monitoring using built-in self-test for embedded memories. In Proceedings of the IEEE International Test Conference. IEEE Computer Society Press, Los Alamitos, Calif., 872--881. Google ScholarDigital Library
- Synopsys, Inc. 2000. Synopsys Design Compiler 2000.05. Synopsys, Inc. www.synopsys.com.Google Scholar
- van de Goor, A. J. 1991. Testing Semiconductor Memories: Theory and Practice. Wiley, New York. Google ScholarDigital Library
- van de Goor, A. J. and Paalvast, A. 2000. Industrial evaluation of DRAM SIMM tests. In Proceedings of the IEEE International Test Conference. IEEE Computer Society Press, Los Alamitos, Calif., 426--435. Google ScholarDigital Library
- Yarmolik, V. N., Klimets, Y. V., and van de Goor, A. J. 1997. Diagnostic RAM tests. Automat. Cont. Comput. Sci. 31, 2, 11--16.Google Scholar
- Youngs, L. and Paramanandam, S. 1997. Mapping and repairing embedded-memory defects. IEEE Des. Test 14, 1, 18--24. Google ScholarDigital Library
Index Terms
- A data acquisition methodology for on-chip repair of embedded memories
Recommendations
Diagnosis and Repair of Memory with Coupling Faults
The problem of diagnosis and spare allocation for random-access memory (RAM) with coupling faults is addressed. A number of spare allocation algorithms for RAM with row and column redundancy have recently been proposed. These procedures, however, have ...
March tests for word-oriented memories
DATE '98: Proceedings of the conference on Design, automation and test in EuropeMost memory test algorithms are optimized tests for a particular memory technology and a particular set of fault models, under the assumption that the memory is bit-oriented; i.e., read and write operations affect only a single bit in the memory. ...
An Efficient Diagnosis Scheme for RAMs with Simple Functional Faults
This paper presents an efficient diagnosis scheme for RAMs. Three March-based algorithms are proposed to diagnose simple functional faults of RAMs. A March-15 N algorithm is used for locating and partially diagnosing faults of bit-oriented or word-...
Comments