Ian O'Connor
ABSTRACT
Throughput, power consumption, signal integrity, pin count and routing complexity are all increasingly important interconnect issues that the system designer must deal with. Recent advances in integrated optical devices may deliver alternative interconnect solutions enabling drastically enhanced performance. This paper begins by outlining some of the more pressing issues in interconnect design, and goes on to describe system-level optical interconnect for inter- and intra-chip applications. Inter-chip optical interconnect, now a relatively mature technology, can enable greater connectivity for parallel computing for example through the use of optical I/O pads and wavelength division multiplexing. Intra-chip optical interconnect, technologically challenging and requiring new design methods, is presented through a proposal for heterogeneous integration of a photonic "above-IC" layer followed by a design methodology for on-chip optical links. Design technology issues are highlighted and the paper concludes with examples of the use of optical links in clock distribution (with quantitative comparisons of dissipated power between electrical and optical clock distribution networks) and for novel network on chip architectures.
- M. Amann, M. Ortsiefer, and R. Shau. Surface-emitting laser diodes for telecommunications. In Proc. Symp. Opto- and Microelectronic Devices and Circuits, 2002.Google Scholar
- T. Baba. Photonic crystals and microdisk cavities based on GaInAsP-InP system. IEEE J. Selected Topics in Quantum Electronics, 3, 1997.Google Scholar
- L. Benini and G. De Micheli. Networks on chip: A new SoC paradigm. IEEE Computer, 35, 2002. Google ScholarDigital Library
- Y. Cao, T. Sato, D. Sylvester, M. Orchansky, and C. Hu. New paradigm of predictive MOSFET and interconnect modeling for early circuit design. In Proc. Custom Integrated Circuit Conference, June 2000.Google Scholar
- S. Cho et al. Integrated detectors for embedded optical interconnections on electrical boards, modules and integrated circuits. IEEE J. Sel. Topics in Quantum Electronics, 8, 2002.Google Scholar
- J. Collet et al. Architectural approach to the role of optics in mono- and multi-processor machines. Applied Optics, 39, 2000.Google Scholar
- W. Dally and B. Towles. Route packets, not wires: On-chip interconnection networks. In Proc. 38th Design Automation Conference, 2001. Google ScholarDigital Library
- A. Filios et al. Transmission performance of a 1.5-μm 2.5-Gb/s directly modulated tunable VCSEL. IEEE Phot. Tech. Lett., 15, 2003.Google Scholar
- E. Friedman. Clock distribution networks in synchronous digital integrated circuits. Proc. IEEE, 89, 2001.Google Scholar
- M. Fujita, A. Sakai, and T. Baba. Ultrasmall and ultralow threshold GaInAsP-InP microdisk injection lasers: Design, fabrication, lasing characteristics and spontaneous emission factor. IEEE J. Sel. Topics in Quantum Electronics, 5, 1999.Google Scholar
- M. Fujita, R. Ushigome, and T. Baba. Continuous wave lasing in GaInAsP microdisk injection laser with threshold current of 40μA. IEE Electron. Lett., 36, 2000.Google Scholar
- K. W. Goossen. Optoelectronic/VLSI. IEEE Trans. on Advanced Packaging, 22(4), Nov. 1999.Google Scholar
- P. Guerrier and A. Greiner. A generic architecture for on-chip packet-switched interconnections. In Proc. Design, Automation and Test in Europe, 2000. Google ScholarDigital Library
- M. Ingels and M. S. J. Steyaert. A 1-Gb/s, 0.7μm CMOS optical receiver with full rail-to-rail output swing. IEEE J. Solid-State Circuits, 34(7), July 1999.Google ScholarCross Ref
- A. V. Krishnamoorthy and K. W. Goossen. Optoelectronic-VLSI: Photonics integrated with VLSI circuits. IEEE J. Sel. Topics in Quantum Electronics, 4(6), November/December 1998.Google Scholar
- K. Lee et al. Fabrication of ultralow-loss Si/SiO2 waveguides by roughness reduction. Optics Letters, 26, 2001.Google Scholar
- B. E. Little, S. T. Chu, W. Pan, and Y. Kokubun. Microring resonator arrays for VLSI photonics. IEEE Phot. Tech. Lett., 12(3), Mar. 2000.Google Scholar
- J. Liu et al. Ultralow-threshold sapphire substrate-bonded top-emitting 850-nm VCSEL array. IEEE Phot. Lett., 14, 2002.Google Scholar
- A. Martinez, F. Cuesta, and J. Marti. Ultrashort 2-D photonic crystal directional couplers. IEEE Phot. Tech. Lett., 15, 2003.Google Scholar
- J. Morikuni et al. Improvements to the standard theory for photoreceiver noise. IEEE J. Lightwave Technology, 12, 1994.Google Scholar
- M. Notomi et al. Structural tuning of guiding modes of line-defect waveguides of silicon-on-insulator photonic crystal slabs. IEEE J. Quantum Electronics, 38, 2002.Google Scholar
- I. O'Connor, F. Mieyeville, F. Tissafi-Drissi, G. Tosik, and F. Gaffiot. Predictive design space exploration of maximum bandwidth CMOS photoreceiver preamplifiers. In Proc. IEEE International Conference on Electronics, Circuits and Systems, 2003.Google ScholarCross Ref
- A. Sakai, T. Fukazawa, and T. Baba. Low loss ultra-small branches in a silicon photonic wire waveguide. IEICE Tran. Electron., E85-C, 2002.Google Scholar
- A. Sakai, G. Hara, and T. Baba. Propagation characteristics of ultrahigh-Δ optical waveguide on silicon-on-insulator substrate. Jpn. J. Appl. Phys. -- Part 2, 40, 2001.Google Scholar
- S. Schultz, E. Glytsis, and T. Gaylord. Design, fabrication, and performance of preferential-order volume grating waveguide couplers. Applied Optics-IP, 39, 2000.Google Scholar
- C. Seassal et al. InP microdisk lasers on silicon wafer: CW room temperature operation at 1.6μm. IEE Electron. Lett., 37, 2001.Google Scholar
- Semiconductor Industry Association. International Technology Roadmap for Semiconductors, 2001.Google Scholar
- A. Taflove. Computational electrodynamics - The Finite-Difference Time-Domain Method. Artech House, 1995.Google Scholar
- G. Tosik, F. Gaffiot, Z. Lisik, I. O'Connor, and F. Tissafi-Drissi. Optical versus metallic interconnections for clock distribution networks in new VLSI technologies. In Proc. IEEE Power and Timing Modeling, Optimisation and Simulation Conference, 2003.Google Scholar
- A. Vachoux, J. M. Bergé, O. Levia, and J. Raillard. Analog and Mixed Signal Hardware Description Languages. Kluwer Academic Publishers, 1997. Google ScholarDigital Library
Index Terms
- Optical solutions for system-level interconnect
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