ABSTRACT
This chapter presents a tunnel field effect transistor (TFET)-based flash analog-to-digital converter (ADC). All the fundamental blocks of the flash ADC are successfully implemented using TFET. The goal of this chapter is to demonstrate satisfactory performance of flash ADC with low power dissipation. As the world depends on wireless communication extensively, there is a need for an ADC having smaller delay, lower power dissipation, and high sampling frequency. All of the naturally occurring signals are analog in nature, and there is a requirement to process these signals for various applications such as digital signal processing, biomedical signal processing, home automation, and also in radar applications. Therefore, we need an interface for digital-to-analog and analog-to-digital signal conversion. This can be achieved by data converters. ADC plays a very important role in converting analog signals to digital signals, which helps the systems in processing the signal in the digital domain. In this chapter, flash ADC is implemented using 20 nm TFET technology to achieve satisfactory performance with lower power dissipation. Various distinct characteristics of TFET such as ultralow leakage current, steep subthreshold slope, high ON-current-to-OFF-current ratio, delayed saturation, and unidirectional current conduction are observed in this work. Based on the distinct features, that is, unidirectional current conduction and delayed saturation in TFET, challenges in designing TFET-based circuits are identified. TFET-based sample and hold circuit, inverter, NAND gate, multiplexer, and XOR gates have been implemented. All of these functional blocks are used in the design of TFET-based comparator and thermometer-to-binary-code converter circuits. Finally, after combining these blocks, a TFET-based flash ADC has been realized that requires 15 comparators for a 4-bit flash ADC. The designed TFET-based flash ADC can work up to a 2 GS/s sampling frequency. The total power dissipation is observed to be 259 µW when operating with a power supply of 0.9 V. This work is compared with the previously reported CMOS-based flash ADC, and it is found to be more efficient in terms of power and sampling frequency. The resolution is observed to be comparable to the other references. The analysis of TFET-based flash ADC has been carried out using the HSPICE simulations with 20 nm TFET technology.
