Abstract
The development of optical interconnect techniques greatly expands the communication bandwidth and decreases the power consumption at the same time. It provides a prospective solution for both intra-chip and inter-chip links. Herein reported is an integrated wavelength-division multiplexing (WDM)-compatible multimode optical switching system-on-chip (SoC) for large-capacity optical switching among processors. The interfaces for the input and output of the processor signals are electrical, and the on-chip data transmission and switching process are optical. It includes silicon-based microring optical modulator arrays, mode multiplexers/de-multiplexers, optical switches, microring wavelength de-multiplexers and germanium-silicon high-speed photodetectors. By introducing external multi-wavelength laser sources, the SoC achieved the function of on-chip WDM and mode-division multiplexing (MDM) hybrid-signal data transmission and switching on a standard silicon photonics platform. As a proof of concept, signals with a 25 Gbps data rate are implemented on each microring modulator of the fabricated SoC. We illustrated 25 × 3 × 2 Gbps on-chip data throughput with two-by-two multimode switching functionality through implementing three wavelength-channels and two mode-channel hybrid-multiplexed signals for each multimode transmission waveguide. The architecture of the SoC is flexible to scale, both for the number of supported processors and the data throughput. The demonstration paves the way to a large-capacity multimode optical switching SoC.
1 Introduction
The “big data era” poses a great challenge to the transmission and processing capabilities of massive data. The development of a multi-core processor has greatly eased the pressure of data processing. However, the bandwidth requirements for the intra-chip and inter-chip data transmission and switching are still problems that need to be solved urgently [1], [2], [3], [4]. It is reported that Intel developed QuickPath Interconnect to offer a high-speed point-to-point processor interconnect for Intel’s Xeon, Itanium, and certain desktop platforms, which afford a bandwidth over 25.6 GB/s [https://en.wikipedia.org/wiki/Intel_QuickPath_Interconnect]. For Intel’s Xeon Phi and NVIDIA’s graphic cores, the on-chip memory bandwidth requirement is even higher [5, https://en.wikipedia.org/wiki/GeForce_10_series]. Optical interconnect has enormous advantages over electrical interconnect, such as a large bandwidth, low latency, and low power consumption. Due to the low price, the compact device footprint and a high compatibility with the standard complementary metal oxide semiconductor (CMOS) fabrication process, a silicon photonics platform is considered to be excellent for implementing on-chip optical interconnects [6], [7]. Some large-scale photonic integration circuits have been demonstrated on silicon substrates [7], [8], [9], [10], [11] for optical communications. Among them, integration of an optical circuit with an electrical circuit has been reported, in which optical components are in charge of the interconnect of processor cores and memory banks [10]. Moreover, a heterogeneous integrated multi-wavelength communication network has also been demonstrated [11].
For realistic intra-chip and inter-chip optical links, multiplexing techniques provide a powerful solution for achieving a greater communication capacity in a mono-physical channel to meet the ever-increasing bandwidth demand [12]. The wavelength-division multiplexing (WDM) technique has been maturely developed and deployed in optical communication systems [13], [14], [15], [16]. Mode-division multiplexing (MDM), as a new form of optical parallelism, is one of the promising technologies to seamlessly increase the information capacity [12], [17]. The coupling and conversion of the modes is easy to achieve by the precise fabrication capability of the waveguide structure with the advanced CMOS fabrication techniques, and the device performance is quite stable. A library of functional devices for multimode on-chip optical communications has been developed on a silicon photonics platform, including optical modulators [18], [19], [20], [21], [22], [23], mode multiplexers and de-multiplexers [24], [25], [26], [27], [28], [29], [30], [31], [32], [33], [34], [35], [36], multimode waveguide crossings [37], multimode waveguide bends [38], and multimode optical switches [39], [40], [41], [42], [43], [44]. Moreover, germanium photodetectors are available for on-chip integration [45], [46], [47]. These devices lay a solid foundation for a multimode switching system, and a suitable architecture is in great demand to realize large capacity and channel-scalable on-chip communication.
In this paper, we propose an integrated optical switching system-on-chip (SoC) architecture compatible with WDM and MDM hybrid multiplexed signals. The SoC is constituted by microring optical modulator arrays, mode multiplexers/de-multiplexers, optical switches, microring optical tunable filters and germanium-silicon high-speed photodetectors. By introducing the external wavelength-multiplexed carriers, it is capable of realizing on-chip data transmission and switching function including high-speed parallel optical signal modulation, WDM-compatible mode multiplexing/de-multiplexing, multimode data transmission, multimode signal switching and conversion process from optical to electrical signals. In addition, its switching topology can be highly flexible and scalable by using a 2×2 multimode optical switching unit to build the multimode switching module. As a proof of concept, parallel signals with 25 Gbps data rates are implemented on each microring modulator of the fabricated chip. Through three wavelength-channels and two mode-channels hybrid multiplexing, we illustrated 25×3×2 Gbps on-chip data throughput in multimode waveguides, with a two-by-two switching functionality.
2 Principle and design
Figure 1 shows the architecture of a WDM-compatible multimode optical switching system among arbitrary N (N=2, 3, …) processors. The data input/output ports of processors are all electrical, while the on-chip data switching process is optical. The interfaces between electrical circuits and optical switching systems are electro-optical modulators and photodetectors, which provide conversion from electrical to optical signals and inverse conversion from optical to electrical signals, respectively. Moreover, the data flows for processors are massive at one time, which can be segmented to several parallel channels to process. At the transmitting part, high capacity data from one processor is segmented via the serial-to-parallel procedure and loaded onto multiple modulators. At the receiving part, multiple-channel electrical signals derived from photodetectors are combined via the parallel-to-serial procedure and sent to the target processor. Benefiting from the WDM and MDM hybrid multiplexing system, two-dimensional multiplexed multiple-channel signals can be transmitted through one physical port. The switching module in the center is in charge of controlling the direction of the multiplexed signal flow. Different from a common optical switch, the architecture here should be compatible with WDM and MDM signals. To realize this function, we make use of the conventional switching topologies implemented in single-mode switching, as they have been proved to be non-blocking and have a high switching efficiency [48]. To make these topologies compatible with multimode signals, we use a 2×2 multimode optical switching unit to substitute the conventional signal-mode optical switching unit, and substitute the interconnect waveguide by the multimode waveguide. The switch module illustrated in Figure 1 is an N×N multimode Spanke-Benes network, which is suitable for an arbitrary number of ports N. In this case, the connectivity and routing states are the same with the original single-mode topology. In special situations, if some of the connectivity in the multimode switching system is unnecessary, we can tailor the topology and reduce the number of optical switching units based on the required optical links. Under the architecture, we can scale the optical switch module and the number of electrical/optical interface modules to support an arbitrary number of processors. The data throughput among different processors can be increased effectively. If there are K wavelength channels, M mode channels, and the data rate of one channel is S Gbps, the total data throughput of the system is S×K×M Gbps.
In our demonstration, we focus on the on-chip optical switching subsystem with electrical interfaces, as the rectangle region with dashed frames shows. It can be separated into three functional blocks: electro-optical conversion and mode multiplexing (WDM and MDM hybrid-multiplexed optical signal emitter), multimode optical switching, de-multiplexing and optical-electrical conversion (WDM and MDM hybrid-multiplexed optical signal receiver). As a proof of concept, we specify the scale of the switching block as 2×2, the number of mode channels and wavelength channels supported in the multimode system as two and three, respectively. In this configuration, the constitution of the SoC is illustrated in Figure 2. Continuous-wave lasers with three different wavelengths are multiplexed and coupled into the chip. Due to the limitation of the coupling efficiency between the fiber and waveguide, laser sources are coupled to the fundamental mode of the input optical waveguide. We mark the four fundamental mode input ports as
Consequently, we introduce the parameter design of different functional components. By tuning the effective index of the microring resonator, the resonance wavelength is shifted, which induces a modulation of light intensity. The radii of the microring modulator arrays are set around 7 μm, which endows them with a ~14 nm free spectral range (FSR). Minor differences in radii are set to separate their resonance wavelengths in the range of the FSR at the initial state. To achieve a high modulation speed, a PN junction is embedded in the ring waveguide to modulate its effective index. The P-doping concentration and the N-doping concentration are 2.3×1017 cm−3 and 1.4×1017 cm−3, respectively. The concentration of P-doping and N-doping of 2.0×1020 cm−3 is implemented for an ohmic contact. The “Ω” shaped micro-heaters are integrated on top of the microring modulators to tune the working wavelengths. As the plasma dispersion effect is quite weak, a higher Q-factor is required to achieve a relatively large dynamic extinction ratio. A higher Q-factor means a larger photon lifetime, which in turn will affect the modulation speed. The Q-factor is mainly decided by the propagation loss in the ring waveguide region, and the coupling coefficient between the ring waveguide and the straight waveguide. The distance from the heavily-doped regions to the side of rib waveguide is set as 600 nm. Multiple gap parameters between the straight waveguide edge and the ring waveguide edge are also pre-trialed to make it closer to the condition of critical coupling, so that the extinction ratio can be maximized. The optimized value of the gap is 400 nm.
In the switching block, to make it compatible with the WDM signals, we use an asymmetric directional coupler (ADC) to construct the two-channel mode multiplexers/de-multiplexers, and use a Mach-Zehnder interferometer (MZI) to construct the 2×2 single-mode optical switching unit. Both of them have relatively large optical bandwidths [32]. The width of the waveguide carrying the fundamental mode is chosen to be 400 nm and the widths of those carrying the TE1 modes are chosen to be 916 nm. In the wavelength de-multiplex block, AD-MRRs are utilized as the wavelength filters. We set the radii of them as 10 μm, and their FSRs are about 10 nm. To make a tradeoff between insertion loss and extinction ratio (the crosstalk suppression of adjacent wavelength channels), the gap between the straight waveguide edge and the ring waveguide edge is designed as 240 nm. Simulation results show that in this parameter, the insertion loss of the drop port is less than 0.2 dB, and the extinction ratio is more than 20 dB. The 3 dB bandwidth of the drop port is about 0.54 nm, i.e. approximately 67.5 GHz, which guarantees high quality 25 Gbps optical signal transmission. Germanium-silicon waveguide photodetectors are integrated on silicon-on-insulator (SOI) wafers for optical-electro signal conversion. The thickness of the selective heteroepitaxy of germanium is 500 nm. Through doping on its top, vertical n-i-p junction structures are constructed. Previous experimental data show that the responsivity of the photodetector at 1550 nm is about 0.75 A/W at a bias voltage of −1 V [45]. All of these components are monolithically integrated on SOI wafers using a process integration flow that is compatible with CMOS integration in terms of both the thermal budget and fabrication feasibility.
3 Fabrication and experimental characterization
The device is fabricated on an 8-inch SOI wafer with a 220-nm-thick top silicon layer and a 2-μm-thick buried silicon dioxide (SiO2) layer at the Institute of Microelectronics, Singapore. To define the patterns, 248-nm-deep ultraviolet photolithography is used, and inductively coupled plasma etching is employed to form the silicon waveguides. After that, ion implantation is used to form the p-doping and n-doping regions. For the anode formation of the germanium vertical n-i-p photodetectors, p-type implants are performed on silicon layers. The implanted dopants in silicon are activated using a rapid thermal anneal at 1030°C for 5 s prior to germanium epitaxy. After depositing a 60-nm-thick SiO2 layer, windows are etched in SiO2 using an anisotropic dry etch followed by a wet etch, to ensure that the silicon surface is not damaged by the reactive ion etching process. Germanium is then selectively grown to a thickness of 500 nm via an ultrahigh vacuum chemical vapor deposition, and phosphorus top implants are used for n-doping. A 1500-nm-thick silica layer is deposited on the silicon layer by plasma-enhanced chemical vapor deposition (PECVD), which is used to prevent the absorption of the optical field by the metal. Then a 200-nm-thick titanium nitride is sputtered on the separate layer, and a 1-μm-wide “Ω” shaped titanium nitride heater is fabricated on each of the microring resonators. Via holes are etched after depositing a 300-nm-thick silica layer by PECVD. Finally, aluminum wires and pads are fabricated. Figure 3A shows a schematic of the sectional view and Figure 3B shows the micrograph of the fabricated device.
To characterize the static optical transmission spectra and monitor the state of each component (e.g. the resonance wavelength of microring modulators) in data transmission and the switching process, we introduce a multimode interference based 1×2 power splitter before the AD-MRR wavelength filters. Half of the power is sent to the wavelength filters and photodetectors, and the other half is sent to the output coupling region, where light is coupled to the fibers for analyzing. The four fundamental mode optical output ports are labeled as
For the static spectral characterization, an amplified spontaneous emission source and an optical spectrum analyzer are connected to the input and output of the device. In the coupling region, 200-μm-long linearly inverse tapers with 180 nm tips are used to couple the light into and out of the device. A DC power supply is utilized to tune the voltage to the micro-heaters, apply bias voltage to the PN junctions of the microring resonators and photodetectors, and change the switching state of the optical switching units. Thermal tuning efficiencies of the micro-heaters and the modulation efficiencies of the microring modulators can also be characterized.
The coupling loss is about 3.0 dB between one butt and the lensed fiber with a spot size of 5.0 μm. As previously mentioned, the four fundamental mode input ports and four output ports at the two edges of the chip are marked by
Optical link | M1 (TE0) channel | M2 (TE1) channel |
---|---|---|
I1→O1 | −12.3~−11.1 dB | −15.6~−11.7 dB |
I2→O1 | −11.8~−10.8 dB | −15.1~−11.7 dB |
I2→O2 | −11.9~−11.6 dB | −15.2~−12.2 dB |
I1→O2 | −12.3~−11.7 dB | −16.4~−12.1 dB |
DC voltages are implemented on the micro-heaters and PN junctions of the microring modulators. Characterization results show that the heating efficiency is 15.7 mW/nm. The modulation efficiency shown in Figure 6, which is represented by VπLπ [19], [20], is 1.11 V·cm at −1 V. When a −6 V reversed bias voltage is applied on the PN junctions, the resonance wavelength shift is about 0.1 nm. By setting the working wavelength at this position, compared with its initial resonance wavelength, its extinction ratio is 16.2 dB.
A vector network analyzer is utilized to characterize the electro-optic bandwidth of the microring modulator and photodetector. Figure 7A shows the electro-optic response S21 parameters (dB) of the microring modulator; its bandwidth is about 20 GHz. Figure 7B shows the optic-electro response S21 parameters of the photodetector; its bandwidth is about 25 GHz. Consequently, high-speed electrical signals are implemented on the microring modulator arrays. Continuous-wave light at different wavelengths is generated by tunable lasers and coupled into the device. The 25 Gbps pseudorandom binary sequence electrical signal with a pattern length of 29-1 is applied to the microring modulators through an radio frequency (RF) probe. Based on the DC response and the limitation of our electrical signal amplifier, the Vp-p of the RF driving signal is set to be 5.0 V with a −2.5 V DC bias voltage. The optical signals from the monitor output are filtered by an external tunable wavelength filter, and then sent to the digital communication analyzer for eye diagram observation. Figure 8 shows the eye diagrams and the corresponding bit-error-rates (BER) of the system at three wavelength channels and two different mode channels. In each switching state, we show one of the two optical links, because the performance of the other one is almost identical according to the transmission spectra. Here we choose I1→O1 and I1→O2. Clear and open eye diagrams of optical signals from the waveguide output verify the function of signal modulation, multiplexing/de-multiplexing and switching, and the extinction ratios of eye diagrams are about 7.7 dB. The aggregate data rate of the multimode bus waveguide is 25×3×2 Gbps.
At the other port of the power splitter, the signals come through an AD-MRR-based wavelength filter and the photodetectors. A bias voltage of −1 V is implemented on the photodetector to collect the light-induced carriers. The electric signal directly from the photodetector is AC-coupled through the Bias-T and inspected on the digital communication analyzer. We tune the on-chip wavelength filter to de-multiplex the three wavelengths one by one. The insertion loss, FSR, extinction ratio and 3-dB bandwidth of the wavelength filter are ~0.4 dB, ~10 nm, 20.9 dB and 0.39 nm, respectively. The final results are shown in the even columns of the eye diagrams, which correspond to the optical signals at their left side. The eye diagrams are also clear and open, and not severely deteriorated compared with the optical signals, which verify the optical-electrical transform function. To characterize the data switching performance of the whole system, we use a real-time oscilloscope to collect the received electrical signal for BER measurement. A variable optical attenuator is used to control the optical power. The results corresponding to the eye diagrams are shown in the lower part. When the received power reached −5.1 dBm and −4.6 dBm for M1 and M2, respectively, at 1550.8 nm, the BER is less than 1e−9. For the other two wavelengths, the disparity of the received power for BER at 1e−9 is less than 0.6 dB compared with the result of 1550.8 nm. Because the microring modulators are wavelength-sensitive, thermal crosstalk would decrease the signal qualities in large-scale applications. To minimize the influence, we can embed in-line monitors in microring modulators and use feedback control to lock their resonances in the future [51].
Finally, we implement a 10 kHz square-wave on the switch block to measure its switching speed. Tuned by thermo-optic effects, the response time is around 20 μs.
4 Conclusion
In conclusion, we propose the architecture of a WDM-compatible multimode optical switching system and demonstrate an integrated multimode optical switching SoC. The SoC consists of microring optical modulator arrays, mode multiplexers/de-multiplexers, optical switches, microring-based optical filters and germanium-silicon high-speed photodetectors. It realizes the function of high-speed parallel electro-optical signal modulation, WDM-compatible mode multiplexing/de-multiplexing, multimode data transmission, multimode signal switching and the optical-electrical signal conversion process. As a proof of concept, signals with a 25 Gbps data rate are implemented on each microring modulator. Through three wavelength channels and two mode channels multiplexing, we illustrate 25×3×2 Gbps on-chip data throughput with two-by-two multimode switching functionality. The input and output interfaces of signals are electrical, and the data transmission and switching process are optical. We envision that the architecture paves a feasible way to a monolithic integrated multimode optical interconnect SoC.
Funding source: National Key R&D Program of China
Award Identifier / Grant number: 2017YFA0206402
Funding source: China National Funds for Distinguished Young Scientists
Award Identifier / Grant number: 61825504
Funding source: National Natural Science Foundation of China
Award Identifier / Grant number: 61704168
Award Identifier / Grant number: 61575187
Award Identifier / Grant number: 61535002
Award Identifier / Grant number: 61505198
Funding statement: National Key R&D Program of China (2017YFA0206402); China National Funds for Distinguished Young Scientists (Grant No. 61825504); National Natural Science Foundation of China (NSFC) (61704168, 61575187, 61535002, and 61505198); The Opened Fund of the State Key Laboratory of Integrated Optoelectronics No. IOSKL2018KF15.
Acknowledgments
We acknowledge Dr. Huifu Xiao for assistance in figure preparation and Dr. Wei Chang for useful discussion.
References
[1] Tkach RW. Scaling optical communications for the next decade and beyond. Bell Labs Tech J 2010;14:3–9.10.1002/bltj.20400Search in Google Scholar
[2] Essiambre RJ, Tkach RW. Capacity trends and limits of optical communication networks. Proc IEEE 2012;100:1035–55.10.1109/JPROC.2012.2182970Search in Google Scholar
[3] Winzer PJ. Scaling optical fiber networks: challenges and solutions. Opt Photonics News 2015;26:28–35.10.1364/OPN.26.3.000028Search in Google Scholar
[4] Miller DAB. Device requirements for optical interconnects to silicon chips. Proc IEEE 2009;97:1166–85.10.1109/JPROC.2009.2014298Search in Google Scholar
[5] Fang J, Varbanescu A, Sips H, et al. An empirical study of Intel Xeon Phi. arXiv preprint arXiv:1310.5842, 2013.Search in Google Scholar
[6] Atabaki AH, Moazeni S, Pavanello F, et al. Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip. Nature 2018;556:349.10.1038/s41586-018-0028-zSearch in Google Scholar PubMed
[7] Doerr CR. Silicon photonic integration in telecommunications. Front Phys 2015;3:37.10.3389/fphy.2015.00037Search in Google Scholar
[8] Sun J, Timurdogan E, Yaacobi A, et al. Large-scale nanophotonic phased array. Nature 2013;493:195.10.1038/nature11727Search in Google Scholar PubMed
[9] Arakawa Y, Nakamura T, Urino Y, et al. Silicon photonics for next generation system integration platform. IEEE Commun Mag 2013;51:72–7.10.1109/MCOM.2013.6476868Search in Google Scholar
[10] Sun C, Wade MT, Lee Y, et al. Single-chip microprocessor that communicates directly using light. Nature 2015;528:534.10.1038/nature16454Search in Google Scholar PubMed
[11] Zhang C, Zhang S, Peters JD, et al. 8×8×40 Gbps fully integrated silicon photonic network on chip. Optica 2016;3:785–6.10.1364/OPTICA.3.000785Search in Google Scholar
[12] Dai D, Bowers JE. Silicon-based on-chip multiplexing technologies and devices for Peta-bit optical interconnects. Nanophotonics 2014;3:283–311.10.1515/nanoph-2013-0021Search in Google Scholar
[13] Keiser GE. A review of WDM technology and applications. Opt Fiber Technol 1999;5:3–39.10.1006/ofte.1998.0275Search in Google Scholar
[14] Dong P. Silicon photonic integrated circuits for wavelength-division multiplexing applications. IEEE J Sel Top Quantum Electron 2016;22:370–8.10.1109/JSTQE.2016.2575358Search in Google Scholar
[15] Hu T, Qiu H, Yu P, et al. Wavelength-selective 4×4 nonblocking silicon optical router for networks-on-chip. Opt Lett 2011;36:4710–2.10.1364/OL.36.004710Search in Google Scholar PubMed
[16] Fang Q, Liow TY, Song J F, et al. WDM multi-channel silicon photonic receiver with 320 Gbps data transmission capability. Opt Express 2010;18:5106–13.10.1364/OE.18.005106Search in Google Scholar PubMed
[17] Li G, Bai N, Zhao N, et al. Space-division multiplexing: the next frontier in optical communication. Adv Opt Photonics 2014;6:413–87.10.1364/AOP.6.000413Search in Google Scholar
[18] Xu Q, Schmidt B, Pradhan S, et al. Micrometre-scale silicon electro-optic modulator. Nature 2005;435:325–7.10.1038/nature03569Search in Google Scholar PubMed
[19] Xiao X, Xu H, Li X, et al. 25 Gbit/s silicon microring modulator based on misalignment-tolerant interleaved PN junctions. Opt Express 2012;20:2507–15.10.1364/OE.20.002507Search in Google Scholar PubMed
[20] Baba T, Akiyama S, Imai M, et al. 50-Gb/s ring-resonator-based silicon modulator. Opt Express 2013;21:11869–76.10.1364/OE.21.011869Search in Google Scholar PubMed
[21] Yang L, Ding J. High-speed silicon Mach–Zehnder optical modulator with large optical bandwidth. J Lightwave Technol 2014;32:966–70.10.1109/JLT.2013.2295401Search in Google Scholar
[22] Li E, Gao Q, Liverman S, Wang A. One-volt silicon photonic crystal nanocavity modulator with indium oxide gate. Opt Lett 2018;43:4429–32.10.1364/OL.43.004429Search in Google Scholar PubMed
[23] Li M, Wang L, Li X, et al. Silicon intensity Mach–Zehnder modulator for single lane 100 Gb/s applications. Photon Res 2018;6:109–16.10.1364/PRJ.6.000109Search in Google Scholar
[24] Kawaguchi Y, Tsutsumi K. Mode multiplexing and demultiplexing devices using multimode interference couplers. Electron Lett 2002;38:1701–2.10.1049/el:20021154Search in Google Scholar
[25] Greenberg M, Orenstein M. Multimode add-drop multiplexing by adiabatic linearly tapered coupling. Opt Express 2005;13:9381–7.10.1364/OPEX.13.009381Search in Google Scholar PubMed
[26] Bagheri S, Green WMJ. Silicon-on-insulator mode-selective add-drop unit for on-chip mode-division multiplexing. 6th IEEE Int Conf Group IV Photonics 2009:166–8.10.1109/GROUP4.2009.5338328Search in Google Scholar
[27] Uematsu T, Ishizaka Y, Kawaguchi Y, et al. Design of a compact two-mode multi/demultiplexer consisting of multimode interference waveguides and a wavelength-insensitive phase shifter for mode-division multiplexing transmission. J Lightwave Technol 2012;30:2421–6.10.1109/JLT.2012.2199961Search in Google Scholar
[28] Driscoll JB, Grote RR, Souhan B, et al. Asymmetric Y junctions in silicon waveguides for on-chip mode-division multiplexing. Opt Lett 2013;38:1854–6.10.1364/OL.38.001854Search in Google Scholar PubMed
[29] Ding Y, Xu J, Da Ros F, et al. On-chip two-mode division multiplexing using tapered directional coupler-based mode multiplexer and demultiplexer. Opt Express 2013;21:10376–82.10.1364/OE.21.010376Search in Google Scholar PubMed
[30] Qiu H, Yu H, Hu T, et al. Silicon mode multi/demultiplexer based on multimode grating-assisted couplers. Opt Express 2013;21:17904–11.10.1364/OE.21.017904Search in Google Scholar PubMed
[31] Chen CP, Driscoll JB, Ophir N, et al. First demonstration of polarization-multiplexing combined with on-chip mode-division-multiplexing. Opt Fiber Commun Conf 2014:1–3.10.1364/OFC.2014.Th4A.3Search in Google Scholar
[32] Wang J, He S, Dai D. On-chip silicon 8-channel hybrid (de) multiplexer enabling simultaneous mode-and polarization-division-multiplexing. Laser Photonics Rev 2014;8:L18–22.10.1002/lpor.201300157Search in Google Scholar
[33] Luo LW, Ophir N, Chen CP, et al. WDM-compatible mode-division multiplexing on a silicon chip. Nature Commun 2014;5:3069.10.1038/ncomms4069Search in Google Scholar PubMed
[34] Ye M, Yu Y, Chen G, et al. On-chip WDM mode-division multiplexing interconnection with optional demodulation function. Opt Express 2015;23:32130–8.10.1364/OE.23.032130Search in Google Scholar PubMed
[35] Chen W, Wang P, Yang T, et al. Silicon three-mode (de) multiplexer based on cascaded asymmetric Y junctions. Opt Lett 2016;41:2851–4.10.1364/OL.41.002851Search in Google Scholar PubMed
[36] Sun Y, Xiong Y, Winnie NY. Experimental demonstration of a two-mode (de) multiplexer based on a taper-etched directional coupler. Opt Lett 2016;41:3743–6.10.1364/OL.41.003743Search in Google Scholar PubMed
[37] Xu H, Shi Y. Dual-mode waveguide crossing utilizing taper-assisted multimode-interference couplers. Opt Lett 2016;41:5381–4.10.1364/OL.41.005381Search in Google Scholar PubMed
[38] Gabrielli LH, Liu D, Johnson SG, et al. On-chip transformation optics for multimode waveguide bends. Nature Commun 2012;3:1217.10.1038/ncomms2232Search in Google Scholar PubMed
[39] Stern B, Zhu X, Chen CP, et al. On-chip mode-division multiplexing switch. Optica 2015;2:530–5.10.1364/OPTICA.2.000530Search in Google Scholar
[40] Xiong Y, Priti RB, Liboiron-Ladouceur O. High-speed two-mode switch for mode-division multiplexing optical net-works. Optica 2017;4:1098–102.10.1364/OPTICA.4.001098Search in Google Scholar
[41] Priti RB, Bazargani HP, Xiong Y, et al. Mode selecting switch using multimode interference for on-chip optical inter-connects. Opt Lett 2017;42:4131–4.10.1364/OL.42.004131Search in Google Scholar PubMed
[42] Zhang Y, He Y, Zhu Q, et al. On-chip silicon photonic 2×2 mode-and polarization-selective switch with low inter-modal crosstalk. Photon Res 2017;5:521–6.10.1364/PRJ.5.000521Search in Google Scholar
[43] Yang L, Zhou T, Jia H, et al. General architectures for on-chip optical space and mode switching. Optica 2018;5:180–7.10.1364/OPTICA.5.000180Search in Google Scholar
[44] Sun C, Wu W, Yu Y, et al. De-multiplexing free on-chip low-loss multimode switch enabling reconfigurable inter-mode and inter-path routing. Nanophotonics 2018;7:1571–80.10.1515/nanoph-2018-0053Search in Google Scholar
[45] Liow T Y, Ang K W, Fang Q, et al. Silicon modulators and germanium photodetectors on SOI: monolithic integration, compatibility, and performance optimization. IEEE J Sel Top Quantum Electron 2010;16:307–15.10.1109/JSTQE.2009.2028657Search in Google Scholar
[46] Fang Q, Jia L, Song J, et al. Demonstration of a vertical pin Ge-on-Si photo-detector on a wet-etched Si recess. Opt Express 2013;21:23325–30.10.1364/OE.21.023325Search in Google Scholar PubMed
[47] Michel J, Liu J, Kimerling LC. High-performance Ge-on-Si photodetectors. Nat Photonics 2010;4:527.10.1038/nphoton.2010.157Search in Google Scholar
[48] Spanke RA, Benes VE. N-stage planar optical permutation network. Appl Opt 1987;26:1226–9.10.1364/AO.26.001226Search in Google Scholar PubMed
[49] Dupuis N, Rylyakov AV, Schow C L, et al. Ultralow crosstalk nanosecond-scale nested 2×2 Mach–Zehnder silicon photonic switch. Opt Lett 2016;41:3002–5.10.1364/OL.41.003002Search in Google Scholar PubMed
[50] Xu Q, Fattal D, Beausoleil RG. Silicon microring resonators with 1.5-μm radius. Opt Express 2008;16:4309–15.10.1364/OE.16.004309Search in Google Scholar PubMed
[51] Jayatilleka H, Murray K, Guillén-Torres MÁ, et al. Wavelength tuning and stabilization of microring-based filters using silicon in-resonator photoconductive heaters. Opt Express 2015;23:25084–97.10.1364/OE.23.025084Search in Google Scholar PubMed
©2019 Lin Yang et al., published by De Gruyter, Berlin/Boston
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