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BY 4.0 license Open Access Published by De Gruyter April 27, 2019

WDM-compatible multimode optical switching system-on-chip

  • Hao Jia , Shanglin Yang , Ting Zhou , Sizhu Shao , Xin Fu , Lei Zhang and Lin Yang ORCID logo EMAIL logo
From the journal Nanophotonics

Abstract

The development of optical interconnect techniques greatly expands the communication bandwidth and decreases the power consumption at the same time. It provides a prospective solution for both intra-chip and inter-chip links. Herein reported is an integrated wavelength-division multiplexing (WDM)-compatible multimode optical switching system-on-chip (SoC) for large-capacity optical switching among processors. The interfaces for the input and output of the processor signals are electrical, and the on-chip data transmission and switching process are optical. It includes silicon-based microring optical modulator arrays, mode multiplexers/de-multiplexers, optical switches, microring wavelength de-multiplexers and germanium-silicon high-speed photodetectors. By introducing external multi-wavelength laser sources, the SoC achieved the function of on-chip WDM and mode-division multiplexing (MDM) hybrid-signal data transmission and switching on a standard silicon photonics platform. As a proof of concept, signals with a 25 Gbps data rate are implemented on each microring modulator of the fabricated SoC. We illustrated 25 × 3 × 2 Gbps on-chip data throughput with two-by-two multimode switching functionality through implementing three wavelength-channels and two mode-channel hybrid-multiplexed signals for each multimode transmission waveguide. The architecture of the SoC is flexible to scale, both for the number of supported processors and the data throughput. The demonstration paves the way to a large-capacity multimode optical switching SoC.

1 Introduction

The “big data era” poses a great challenge to the transmission and processing capabilities of massive data. The development of a multi-core processor has greatly eased the pressure of data processing. However, the bandwidth requirements for the intra-chip and inter-chip data transmission and switching are still problems that need to be solved urgently [1], [2], [3], [4]. It is reported that Intel developed QuickPath Interconnect to offer a high-speed point-to-point processor interconnect for Intel’s Xeon, Itanium, and certain desktop platforms, which afford a bandwidth over 25.6 GB/s [https://en.wikipedia.org/wiki/Intel_QuickPath_Interconnect]. For Intel’s Xeon Phi and NVIDIA’s graphic cores, the on-chip memory bandwidth requirement is even higher [5, https://en.wikipedia.org/wiki/GeForce_10_series]. Optical interconnect has enormous advantages over electrical interconnect, such as a large bandwidth, low latency, and low power consumption. Due to the low price, the compact device footprint and a high compatibility with the standard complementary metal oxide semiconductor (CMOS) fabrication process, a silicon photonics platform is considered to be excellent for implementing on-chip optical interconnects [6], [7]. Some large-scale photonic integration circuits have been demonstrated on silicon substrates [7], [8], [9], [10], [11] for optical communications. Among them, integration of an optical circuit with an electrical circuit has been reported, in which optical components are in charge of the interconnect of processor cores and memory banks [10]. Moreover, a heterogeneous integrated multi-wavelength communication network has also been demonstrated [11].

For realistic intra-chip and inter-chip optical links, multiplexing techniques provide a powerful solution for achieving a greater communication capacity in a mono-physical channel to meet the ever-increasing bandwidth demand [12]. The wavelength-division multiplexing (WDM) technique has been maturely developed and deployed in optical communication systems [13], [14], [15], [16]. Mode-division multiplexing (MDM), as a new form of optical parallelism, is one of the promising technologies to seamlessly increase the information capacity [12], [17]. The coupling and conversion of the modes is easy to achieve by the precise fabrication capability of the waveguide structure with the advanced CMOS fabrication techniques, and the device performance is quite stable. A library of functional devices for multimode on-chip optical communications has been developed on a silicon photonics platform, including optical modulators [18], [19], [20], [21], [22], [23], mode multiplexers and de-multiplexers [24], [25], [26], [27], [28], [29], [30], [31], [32], [33], [34], [35], [36], multimode waveguide crossings [37], multimode waveguide bends [38], and multimode optical switches [39], [40], [41], [42], [43], [44]. Moreover, germanium photodetectors are available for on-chip integration [45], [46], [47]. These devices lay a solid foundation for a multimode switching system, and a suitable architecture is in great demand to realize large capacity and channel-scalable on-chip communication.

In this paper, we propose an integrated optical switching system-on-chip (SoC) architecture compatible with WDM and MDM hybrid multiplexed signals. The SoC is constituted by microring optical modulator arrays, mode multiplexers/de-multiplexers, optical switches, microring optical tunable filters and germanium-silicon high-speed photodetectors. By introducing the external wavelength-multiplexed carriers, it is capable of realizing on-chip data transmission and switching function including high-speed parallel optical signal modulation, WDM-compatible mode multiplexing/de-multiplexing, multimode data transmission, multimode signal switching and conversion process from optical to electrical signals. In addition, its switching topology can be highly flexible and scalable by using a 2×2 multimode optical switching unit to build the multimode switching module. As a proof of concept, parallel signals with 25 Gbps data rates are implemented on each microring modulator of the fabricated chip. Through three wavelength-channels and two mode-channels hybrid multiplexing, we illustrated 25×3×2 Gbps on-chip data throughput in multimode waveguides, with a two-by-two switching functionality.

2 Principle and design

Figure 1 shows the architecture of a WDM-compatible multimode optical switching system among arbitrary N (N=2, 3, …) processors. The data input/output ports of processors are all electrical, while the on-chip data switching process is optical. The interfaces between electrical circuits and optical switching systems are electro-optical modulators and photodetectors, which provide conversion from electrical to optical signals and inverse conversion from optical to electrical signals, respectively. Moreover, the data flows for processors are massive at one time, which can be segmented to several parallel channels to process. At the transmitting part, high capacity data from one processor is segmented via the serial-to-parallel procedure and loaded onto multiple modulators. At the receiving part, multiple-channel electrical signals derived from photodetectors are combined via the parallel-to-serial procedure and sent to the target processor. Benefiting from the WDM and MDM hybrid multiplexing system, two-dimensional multiplexed multiple-channel signals can be transmitted through one physical port. The switching module in the center is in charge of controlling the direction of the multiplexed signal flow. Different from a common optical switch, the architecture here should be compatible with WDM and MDM signals. To realize this function, we make use of the conventional switching topologies implemented in single-mode switching, as they have been proved to be non-blocking and have a high switching efficiency [48]. To make these topologies compatible with multimode signals, we use a 2×2 multimode optical switching unit to substitute the conventional signal-mode optical switching unit, and substitute the interconnect waveguide by the multimode waveguide. The switch module illustrated in Figure 1 is an N×N multimode Spanke-Benes network, which is suitable for an arbitrary number of ports N. In this case, the connectivity and routing states are the same with the original single-mode topology. In special situations, if some of the connectivity in the multimode switching system is unnecessary, we can tailor the topology and reduce the number of optical switching units based on the required optical links. Under the architecture, we can scale the optical switch module and the number of electrical/optical interface modules to support an arbitrary number of processors. The data throughput among different processors can be increased effectively. If there are K wavelength channels, M mode channels, and the data rate of one channel is S Gbps, the total data throughput of the system is S×K×M Gbps.

Figure 1: Architecture of a wavelength-division multiplexing (WDM)-compatible multimode optical switching system among arbitrary N processors.DeMUX, de-multiplexer; MOD, modulator; MUX, multiplexer; PD, photodetector.
Figure 1:

Architecture of a wavelength-division multiplexing (WDM)-compatible multimode optical switching system among arbitrary N processors.

DeMUX, de-multiplexer; MOD, modulator; MUX, multiplexer; PD, photodetector.

In our demonstration, we focus on the on-chip optical switching subsystem with electrical interfaces, as the rectangle region with dashed frames shows. It can be separated into three functional blocks: electro-optical conversion and mode multiplexing (WDM and MDM hybrid-multiplexed optical signal emitter), multimode optical switching, de-multiplexing and optical-electrical conversion (WDM and MDM hybrid-multiplexed optical signal receiver). As a proof of concept, we specify the scale of the switching block as 2×2, the number of mode channels and wavelength channels supported in the multimode system as two and three, respectively. In this configuration, the constitution of the SoC is illustrated in Figure 2. Continuous-wave lasers with three different wavelengths are multiplexed and coupled into the chip. Due to the limitation of the coupling efficiency between the fiber and waveguide, laser sources are coupled to the fundamental mode of the input optical waveguide. We mark the four fundamental mode input ports as I1M1,I1M2,I2M1, and I2M2. Generally, IiMj(i, j=1, 2, 3,…) represents the light input from the corresponding port which will be coupled to the Jth mode channel of the input port Ii at the multimode switching block. In this proof, the range of i and j are both restricted to 1 and 2. At the WDM and MDM hybrid-multiplexed optical signal emitter (marked as E→O), light with multi-wavelengths flows through the microring modulator arrays. The light at each wavelength is modulated by one modulator. Then, the fundamental mode light carriers coming from I1M1 and I1M2 are multiplexed to the upper multimode bus waveguide, and I2M1,I2M2 are multiplexed to the lower multimode bus waveguide. At the switching block, the directions of the two groups of multimode signals are controlled. For a 2×2 multimode optical switch, there are two switching states named “cross” and “bar”, representing two signals from the input port marked as I1/I2 which are transmitted to the output port O2/O1 or O1/O2. Inside the switch block, multimode signals are firstly de-multiplexed to the fundamental mode, processed by parallel single-mode optical switching units, and then transformed back to the original mode sequences. This block can be cascaded to realize a large scale multimode switch [43]. Finally, at the receiving block (marked as DeMUX and O→E), the signals are first de-multiplexed to the single-mode by the mode de-multiplexers, and then sent to add-drop microring resonator (AD-MRR)-based wavelength de-multiplexers. Theoretically, the number of AD-MRRs and photodetectors for one mode should be equal to the input wavelength. Due to the limitation of the layout, in our demonstration we set one AD-MRR and one photodetector for one mode. By tuning the resonance wavelength, three wavelength channels can be de-multiplexed one by one. These optical signals are sent to the photodetectors and transformed to electrical signals.

Figure 2: Device realization of the multimode optical switching system-on-chip (SoC) with three wavelength channels and two mode channels.CW, continuous-wave; DeMUX, de-multiplexer; MM-BW, multimode bus waveguide; M-MUX, mode multiplexer; MOD, modulator; PD, photodetector; W-DeMUX, wavelength de-multiplexer.
Figure 2:

Device realization of the multimode optical switching system-on-chip (SoC) with three wavelength channels and two mode channels.

CW, continuous-wave; DeMUX, de-multiplexer; MM-BW, multimode bus waveguide; M-MUX, mode multiplexer; MOD, modulator; PD, photodetector; W-DeMUX, wavelength de-multiplexer.

Consequently, we introduce the parameter design of different functional components. By tuning the effective index of the microring resonator, the resonance wavelength is shifted, which induces a modulation of light intensity. The radii of the microring modulator arrays are set around 7 μm, which endows them with a ~14 nm free spectral range (FSR). Minor differences in radii are set to separate their resonance wavelengths in the range of the FSR at the initial state. To achieve a high modulation speed, a PN junction is embedded in the ring waveguide to modulate its effective index. The P-doping concentration and the N-doping concentration are 2.3×1017 cm−3 and 1.4×1017 cm−3, respectively. The concentration of P-doping and N-doping of 2.0×1020 cm−3 is implemented for an ohmic contact. The “Ω” shaped micro-heaters are integrated on top of the microring modulators to tune the working wavelengths. As the plasma dispersion effect is quite weak, a higher Q-factor is required to achieve a relatively large dynamic extinction ratio. A higher Q-factor means a larger photon lifetime, which in turn will affect the modulation speed. The Q-factor is mainly decided by the propagation loss in the ring waveguide region, and the coupling coefficient between the ring waveguide and the straight waveguide. The distance from the heavily-doped regions to the side of rib waveguide is set as 600 nm. Multiple gap parameters between the straight waveguide edge and the ring waveguide edge are also pre-trialed to make it closer to the condition of critical coupling, so that the extinction ratio can be maximized. The optimized value of the gap is 400 nm.

In the switching block, to make it compatible with the WDM signals, we use an asymmetric directional coupler (ADC) to construct the two-channel mode multiplexers/de-multiplexers, and use a Mach-Zehnder interferometer (MZI) to construct the 2×2 single-mode optical switching unit. Both of them have relatively large optical bandwidths [32]. The width of the waveguide carrying the fundamental mode is chosen to be 400 nm and the widths of those carrying the TE1 modes are chosen to be 916 nm. In the wavelength de-multiplex block, AD-MRRs are utilized as the wavelength filters. We set the radii of them as 10 μm, and their FSRs are about 10 nm. To make a tradeoff between insertion loss and extinction ratio (the crosstalk suppression of adjacent wavelength channels), the gap between the straight waveguide edge and the ring waveguide edge is designed as 240 nm. Simulation results show that in this parameter, the insertion loss of the drop port is less than 0.2 dB, and the extinction ratio is more than 20 dB. The 3 dB bandwidth of the drop port is about 0.54 nm, i.e. approximately 67.5 GHz, which guarantees high quality 25 Gbps optical signal transmission. Germanium-silicon waveguide photodetectors are integrated on silicon-on-insulator (SOI) wafers for optical-electro signal conversion. The thickness of the selective heteroepitaxy of germanium is 500 nm. Through doping on its top, vertical n-i-p junction structures are constructed. Previous experimental data show that the responsivity of the photodetector at 1550 nm is about 0.75 A/W at a bias voltage of −1 V [45]. All of these components are monolithically integrated on SOI wafers using a process integration flow that is compatible with CMOS integration in terms of both the thermal budget and fabrication feasibility.

3 Fabrication and experimental characterization

The device is fabricated on an 8-inch SOI wafer with a 220-nm-thick top silicon layer and a 2-μm-thick buried silicon dioxide (SiO2) layer at the Institute of Microelectronics, Singapore. To define the patterns, 248-nm-deep ultraviolet photolithography is used, and inductively coupled plasma etching is employed to form the silicon waveguides. After that, ion implantation is used to form the p-doping and n-doping regions. For the anode formation of the germanium vertical n-i-p photodetectors, p-type implants are performed on silicon layers. The implanted dopants in silicon are activated using a rapid thermal anneal at 1030°C for 5 s prior to germanium epitaxy. After depositing a 60-nm-thick SiO2 layer, windows are etched in SiO2 using an anisotropic dry etch followed by a wet etch, to ensure that the silicon surface is not damaged by the reactive ion etching process. Germanium is then selectively grown to a thickness of 500 nm via an ultrahigh vacuum chemical vapor deposition, and phosphorus top implants are used for n-doping. A 1500-nm-thick silica layer is deposited on the silicon layer by plasma-enhanced chemical vapor deposition (PECVD), which is used to prevent the absorption of the optical field by the metal. Then a 200-nm-thick titanium nitride is sputtered on the separate layer, and a 1-μm-wide “Ω” shaped titanium nitride heater is fabricated on each of the microring resonators. Via holes are etched after depositing a 300-nm-thick silica layer by PECVD. Finally, aluminum wires and pads are fabricated. Figure 3A shows a schematic of the sectional view and Figure 3B shows the micrograph of the fabricated device.

Figure 3: Physical structure of the device.(A) Schematic of the sectional view. (B) Micrograph of the fabricated device. AD-MRR, add-drop microring resonator; MM-BW, multimode bus waveguide; MOD, modulator; MUX, multiplexer; PD, photodetector.
Figure 3:

Physical structure of the device.

(A) Schematic of the sectional view. (B) Micrograph of the fabricated device. AD-MRR, add-drop microring resonator; MM-BW, multimode bus waveguide; MOD, modulator; MUX, multiplexer; PD, photodetector.

To characterize the static optical transmission spectra and monitor the state of each component (e.g. the resonance wavelength of microring modulators) in data transmission and the switching process, we introduce a multimode interference based 1×2 power splitter before the AD-MRR wavelength filters. Half of the power is sent to the wavelength filters and photodetectors, and the other half is sent to the output coupling region, where light is coupled to the fibers for analyzing. The four fundamental mode optical output ports are labeled as O1M1,O1M2,O2M1, and O2M2, which have the same meaning as the definition of the input ports. The whole experimental setup is shown in Figure 4.

Figure 4: Experimental setup for characterizing the device.ASE, amplified spontaneous emission; DCA, digital communication analyzer; DCS, direct-current source; DUT, device under test; OSA, optical spectrum analyzer; PC, polarization controller; PPG, pulse pattern generator; TF, tunable filter; TL, tunable laser.
Figure 4:

Experimental setup for characterizing the device.

ASE, amplified spontaneous emission; DCA, digital communication analyzer; DCS, direct-current source; DUT, device under test; OSA, optical spectrum analyzer; PC, polarization controller; PPG, pulse pattern generator; TF, tunable filter; TL, tunable laser.

For the static spectral characterization, an amplified spontaneous emission source and an optical spectrum analyzer are connected to the input and output of the device. In the coupling region, 200-μm-long linearly inverse tapers with 180 nm tips are used to couple the light into and out of the device. A DC power supply is utilized to tune the voltage to the micro-heaters, apply bias voltage to the PN junctions of the microring resonators and photodetectors, and change the switching state of the optical switching units. Thermal tuning efficiencies of the micro-heaters and the modulation efficiencies of the microring modulators can also be characterized.

The coupling loss is about 3.0 dB between one butt and the lensed fiber with a spot size of 5.0 μm. As previously mentioned, the four fundamental mode input ports and four output ports at the two edges of the chip are marked by I1M1,I1M2,I2M1, and I2M2, and O1M1,O1M2,O2M1, and O2M2, respectively. Considering the kernel function of multimode optical switching, we list the transmission spectra by multimode optical links I1O1, I2O2, I1O2, and I2O1, which represent the whole optical link of the “bar” and “cross” switching states, respectively. Spectra are shown in Figures 5A–D. In each subfigure, two curves at the top level (near −10 dB) are the signals with two mode channels TE0 and TE1. The insertion losses of the signal optical links among the range of 1525–1565 nm are illustrated in Table 1, and include the coupling loss and the extra loss of the 1×2 power splitter. The insertion losses of the ADC-based mode de-multiplexer are 0.4 dB and 0.5 dB for the M1 (TE0) and M2 (TE1) channels, respectively, and the optical crosstalks are lower than −25.5 and −24.1 dB for the two channels, respectively. The other curves are the crosstalks derived from undesired inputs. The crosstalk for a specific mode in one optical link is mainly decided by the inter-mode crosstalk for the same optical link, the link-crosstalk for the same mode order and the inter-mode crosstalk from the other optical link. For example in Figure 5A, the top two curves in black and dark yellow represent optical links I1M1O1M1 and I1M2O1M2 for the signal, which correspond to TE0 and TE1 mode channels, respectively, of the multimode optical link I1O1. The remaining curves are undesired crosstalk coming from another input port and another mode. Among them, link crosstalks for the same mode order are I2M1O1M1 and I2M2O1M2. The inter-mode crosstalks for the same optical link, which is caused by the inter-mode crosstalk of the mode de-multiplexers and multiplexers, are I1M2O1M1and I1M1O1M2. In addition, the inter-mode crosstalks from the other optical link are I2M2O1M1 and I2M1O1M2. Obviously, the link crosstalk is much larger than the other two terms. Especially, crosstalks from both different links and different modes are negligible, as they come through two-order filtering. The lowest noise value is near −60 dB, which is about the noise background of the optical spectrum analyzer. Situations of the other figures coincide with this analysis. The main crosstalk term is the link crosstalk for the same mode, which is caused by the crosstalk from the Mach-Zehnder single-mode optical switching unit. The cascaded MZI optical switch [49] can decrease the first-order crosstalk, which is an effective way to decrease the noise of the system. The maximum crosstalk for all modes in the four optical links I1O1, I2O2, I1O2, and I2O1 is smaller than −20.2 dB. Inside the envelope of the curves there exist periodic dips, which are the resonance peaks of the microring modulator arrays. The period is equal to the FSR of the microring resonators, which is approximately 13.5 nm. The Q-factor at 1550 nm is approximately 6000. We can enlarge the FSR by decreasing the radius of the microring modulator. It is reported that a microring resonator with a 1.5 μm radius has an FSR of about 62.5 nm [50]. By this means we can hold more wavelength channels in the range of one FSR.

Figure 5: Transmission spectra for the signal optical links I1→O1 (A), I2→O1 (B), I2→O2 (C), I1→O2 (D) and the corresponding noise links.XT, crosstalk.
Figure 5:

Transmission spectra for the signal optical links I1O1 (A), I2O1 (B), I2O2 (C), I1O2 (D) and the corresponding noise links.

XT, crosstalk.

Table 1:

The insertion losses of different optical links for two mode channels.

Optical linkM1 (TE0) channelM2 (TE1) channel
I1→O1−12.3~−11.1 dB−15.6~−11.7 dB
I2→O1−11.8~−10.8 dB−15.1~−11.7 dB
I2→O2−11.9~−11.6 dB−15.2~−12.2 dB
I1→O2−12.3~−11.7 dB−16.4~−12.1 dB

DC voltages are implemented on the micro-heaters and PN junctions of the microring modulators. Characterization results show that the heating efficiency is 15.7 mW/nm. The modulation efficiency shown in Figure 6, which is represented by VπLπ [19], [20], is 1.11 V·cm at −1 V. When a −6 V reversed bias voltage is applied on the PN junctions, the resonance wavelength shift is about 0.1 nm. By setting the working wavelength at this position, compared with its initial resonance wavelength, its extinction ratio is 16.2 dB.

Figure 6: Electro-optic response of the microring modulator.(A) Wavelength shift with the bias voltage applied on the PN junction. (B) Calculated modulation efficiency VπLπ with the applied voltage.
Figure 6:

Electro-optic response of the microring modulator.

(A) Wavelength shift with the bias voltage applied on the PN junction. (B) Calculated modulation efficiency VπLπ with the applied voltage.

A vector network analyzer is utilized to characterize the electro-optic bandwidth of the microring modulator and photodetector. Figure 7A shows the electro-optic response S21 parameters (dB) of the microring modulator; its bandwidth is about 20 GHz. Figure 7B shows the optic-electro response S21 parameters of the photodetector; its bandwidth is about 25 GHz. Consequently, high-speed electrical signals are implemented on the microring modulator arrays. Continuous-wave light at different wavelengths is generated by tunable lasers and coupled into the device. The 25 Gbps pseudorandom binary sequence electrical signal with a pattern length of 29-1 is applied to the microring modulators through an radio frequency (RF) probe. Based on the DC response and the limitation of our electrical signal amplifier, the Vp-p of the RF driving signal is set to be 5.0 V with a −2.5 V DC bias voltage. The optical signals from the monitor output are filtered by an external tunable wavelength filter, and then sent to the digital communication analyzer for eye diagram observation. Figure 8 shows the eye diagrams and the corresponding bit-error-rates (BER) of the system at three wavelength channels and two different mode channels. In each switching state, we show one of the two optical links, because the performance of the other one is almost identical according to the transmission spectra. Here we choose I1O1 and I1O2. Clear and open eye diagrams of optical signals from the waveguide output verify the function of signal modulation, multiplexing/de-multiplexing and switching, and the extinction ratios of eye diagrams are about 7.7 dB. The aggregate data rate of the multimode bus waveguide is 25×3×2 Gbps.

Figure 7: The electro-optic bandwidth characterization of microring modulator and photodetector.(A) Microring modulator and (B) photodetector.
Figure 7:

The electro-optic bandwidth characterization of microring modulator and photodetector.

(A) Microring modulator and (B) photodetector.

Figure 8: 25 Gbps eye-diagram derived from optical signals from monitor waveguide outputs (odd-column) and electrical signals from photodetectors (even column), and the corresponding bit-error-rates of the system.
Figure 8:

25 Gbps eye-diagram derived from optical signals from monitor waveguide outputs (odd-column) and electrical signals from photodetectors (even column), and the corresponding bit-error-rates of the system.

At the other port of the power splitter, the signals come through an AD-MRR-based wavelength filter and the photodetectors. A bias voltage of −1 V is implemented on the photodetector to collect the light-induced carriers. The electric signal directly from the photodetector is AC-coupled through the Bias-T and inspected on the digital communication analyzer. We tune the on-chip wavelength filter to de-multiplex the three wavelengths one by one. The insertion loss, FSR, extinction ratio and 3-dB bandwidth of the wavelength filter are ~0.4 dB, ~10 nm, 20.9 dB and 0.39 nm, respectively. The final results are shown in the even columns of the eye diagrams, which correspond to the optical signals at their left side. The eye diagrams are also clear and open, and not severely deteriorated compared with the optical signals, which verify the optical-electrical transform function. To characterize the data switching performance of the whole system, we use a real-time oscilloscope to collect the received electrical signal for BER measurement. A variable optical attenuator is used to control the optical power. The results corresponding to the eye diagrams are shown in the lower part. When the received power reached −5.1 dBm and −4.6 dBm for M1 and M2, respectively, at 1550.8 nm, the BER is less than 1e−9. For the other two wavelengths, the disparity of the received power for BER at 1e−9 is less than 0.6 dB compared with the result of 1550.8 nm. Because the microring modulators are wavelength-sensitive, thermal crosstalk would decrease the signal qualities in large-scale applications. To minimize the influence, we can embed in-line monitors in microring modulators and use feedback control to lock their resonances in the future [51].

Finally, we implement a 10 kHz square-wave on the switch block to measure its switching speed. Tuned by thermo-optic effects, the response time is around 20 μs.

4 Conclusion

In conclusion, we propose the architecture of a WDM-compatible multimode optical switching system and demonstrate an integrated multimode optical switching SoC. The SoC consists of microring optical modulator arrays, mode multiplexers/de-multiplexers, optical switches, microring-based optical filters and germanium-silicon high-speed photodetectors. It realizes the function of high-speed parallel electro-optical signal modulation, WDM-compatible mode multiplexing/de-multiplexing, multimode data transmission, multimode signal switching and the optical-electrical signal conversion process. As a proof of concept, signals with a 25 Gbps data rate are implemented on each microring modulator. Through three wavelength channels and two mode channels multiplexing, we illustrate 25×3×2 Gbps on-chip data throughput with two-by-two multimode switching functionality. The input and output interfaces of signals are electrical, and the data transmission and switching process are optical. We envision that the architecture paves a feasible way to a monolithic integrated multimode optical interconnect SoC.

Funding source: National Key R&D Program of China

Award Identifier / Grant number: 2017YFA0206402

Award Identifier / Grant number: 61825504

Award Identifier / Grant number: 61704168

Award Identifier / Grant number: 61575187

Award Identifier / Grant number: 61535002

Award Identifier / Grant number: 61505198

Funding statement: National Key R&D Program of China (2017YFA0206402); China National Funds for Distinguished Young Scientists (Grant No. 61825504); National Natural Science Foundation of China (NSFC) (61704168, 61575187, 61535002, and 61505198); The Opened Fund of the State Key Laboratory of Integrated Optoelectronics No. IOSKL2018KF15.

Acknowledgments

We acknowledge Dr. Huifu Xiao for assistance in figure preparation and Dr. Wei Chang for useful discussion.

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Received: 2019-01-07
Revised: 2019-04-01
Accepted: 2019-04-05
Published Online: 2019-04-27

©2019 Lin Yang et al., published by De Gruyter, Berlin/Boston

This work is licensed under the Creative Commons Attribution 4.0 Public License.

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