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Development of A 4H-SiC CMOS Inverter

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Abstract

In this paper we report the first 4H-SiC CMOS inverter, which was designed to be integrated in the process flow of a 4H-SiC power DMOSFET. The channels of both of the n-channel and p-channel MOSFETs of the inverter were 50 µm wide by 3 µm long. NMOSFET threshold voltage (VTH) ranged from 4.4 V at 25°C to 2.2 V at 250°C and PMOSFET VTH ranged from -4.75 V at 25°C to just under -4 V at 300°C. The transfer threshold voltage (Vm) of the 4H-SiC CMOS inverter was in a very tight range of 2.8 V to 2.9 V over the entire temperature range of 25°C to 300°C when using a drive voltage (VDD) of 10 V.

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Authors and Affiliations

  1. Cree, Inc., NC, 27703, Durham, USA

    Brett Adam Hull, Sei-Hyung Ryu, Husna Fatima, Jim Richmond & John W. Palmour

  2. Air Force Research Laboratory, Wright-Patterson AFB, OH, 45433, USA

    James Scofield

Authors
  1. Brett Adam Hull
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  2. Sei-Hyung Ryu
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  3. Husna Fatima
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  4. Jim Richmond
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  5. John W. Palmour
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  6. James Scofield
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Hull, B.A., Ryu, SH., Fatima, H. et al. Development of A 4H-SiC CMOS Inverter. MRS Online Proceedings Library 911, 1302 (2005). https://doi.org/10.1557/PROC-0911-B13-02

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  • DOI: https://doi.org/10.1557/PROC-0911-B13-02

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