EBIC Analysis of Geitering at Si-Si(Ge) Heteroepitaxial Misfit Dislocations as a Function of Impurity Decoration

Abstract

An EBIC analysis is made of decorated heteroepitaxial misfit dislocations formed at the interface of Si-Si(Ge) epitaxial layers grown in a CVD reactor on Si substrates. The electrical activity of the dislocations is studied after decorating the dislocations with Ni and Au impurities introduced by ion-implantation and backside deposited metallic thin films. The impurities are activated by RTA annealing at 400, 800 and 1000°C. A model is presented for the formation of NiSi₂ precipitates on misfit dislocations which suggests that the nucleation and growth of NiSi₂ precipitates is a function of the cleanliness of the as-grown dislocations. It is concluded that the distribution of electrical activity of impurity decorated misfit dislocations is a strong function of the impurity type, condition of the as-grown material, and concentration of metallic impurities introduced during the process of decoration.