Abstract
In the ongoing enhancement of MEMS applications, the STS Advanced Silicon Etch, (ASE™). process satisfies the demanding requirements of the industry. Typically, highly anisotropic. high aspect ratios profiles with fine CD (critical dimension) control are required. Selectivities to photoresist of 150:1 with Si etch rates of up to 10µm/min are demonstrated. Applications range from shallow etched optical devices to through wafer membrane etches. This paper details some of the fundamental trends of the ASE™ process and goes on to discuss how the process has been enhanced to meet product specifications. Parameter ramping is a powerful technique used to achieve the often-conflicting requirements of high etch rate with good profile/CD control. The results are presented in this paper.
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Hopkins, J., Ashraf, H., Bhardwaj, J.K. et al. The Benefits of Process Parameter Ramping During The Plasma Etching of High Aspect Ratio Silicon Structures. MRS Online Proceedings Library 546, 63–68 (1998). https://doi.org/10.1557/PROC-546-63
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DOI: https://doi.org/10.1557/PROC-546-63