Main Article Content
Abstract
Purpose: Recently FinFET technology has gained a lot of attention because of its superior fabrication process that is very similar to the fabrication of a conventional transistor. FinFETs unique feature as well as the potential applications make it a strong contender for the low power chip designs. Research is in full swing to use FinFET in analog circuits like Schmitt trigger, sensors, OPAMP and digital logic. The realization of the FinFET based circuits predicts that it is possible to broaden the concept of Moore’s law without unstoppable scaling of CMOS devices.
Methodology: This work is carried out on the Candence Simulation tool. After the simulation, all these parameters have been compared with previous published 4T Schmitt trigger at 45nm with this design and found that they are in close vicinity.
Main Findings: By combining the superior flexibility and reduced short channel effects (SCEs) of FinFET devices offers a promising approach to implement highly integrated, power-efficient Schmitt Trigger circuit for low power digital applications. Schmitt trigger is a device capable of removing unwanted noise from the input and prevent the other operations from this unwanted noise and improve the performance of the device.
Implications: This study is discussing and performs a comparative analysis of different leakage parameters of a FinFET based Schmitt Trigger with previous 4T Schmitt Trigger at 45nm.
The novelty of Study: Size, power, speed, Cost etc. are important factors for designing any new circuits in the field of Electronics. Various eminent researchers have been making efforts for this. This paper makes some effort to discuss about past research and design a new circuit where the value of delay, leakage power and dynamic power reduces when compared to previously published circuits.
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References
- Al-Sarawi, S. F. (2002). Low-power Schmitt trigger circuit. Electron. Letter. 38, 1009¬-1010. https://doi.org/10.1049/el:20020687 DOI: https://doi.org/10.1049/el:20020687
- Dokic, B.L. (1984). CMOS Schmitt triggers. IEEE Electronic Circuits System, 131(5), 197- 202. https://doi.org/10.1049/ip-g-1.1984.0037 DOI: https://doi.org/10.1049/ip-g-1.1984.0037
- Katyal, V., Geiger, R. L. & Chen, D. J. (2008). Adjustable Hysteresis CMOS Schmitt Trigger. IEEE International Symposium on Circuits and system, ISCAS, 1938-1941. DOI: https://doi.org/10.1109/ISCAS.2008.4541823
- Khandelwal, S., Raj, B. & Gupta, R.D. (2013). Leakage Current and Dynamic Power Analysis Of Finfet Based 7T SRAM at 45nm Technology. International Arab Conference on Information Technology (ACIT’2013), Sudan University.
- Mishra, V. & Akashe, S. (2014). Calculation of Power Delay Product and Energy Delay Product in 4-Bit FinFET Based Priority Encoder. Springer Proceedings, International Conference on Opto-Electronics and Applied Optics (IEM OPTRONIX-2014), Kolkata, India, pp. 283-289. https://doi.org/10.1007/978-81-322-2367-2_36 DOI: https://doi.org/10.1007/978-81-322-2367-2_36
- Mishra, V. & Akashe, S. (2015). Calculation of Average Power, Leakage power, and leakage Current of FinFET based 4-bit Priority Encoder. Proceeding of Fifth IEEE International Conference on Advance Computing & Communication Technologies (ACCT), pp. 65-69, 21 Feb 2015, Rohtak, Haryana. https://doi.org/10.1109/ACCT.2015.82 DOI: https://doi.org/10.1109/ACCT.2015.82
- Pedroni, V. A. (2005). Low-voltage high-speed Schmitt trigger and compact window comparator. Electron. Letter, 41(22), 1213 - 1214. https://doi.org/10.1049/el:20052799 DOI: https://doi.org/10.1049/el:20052799
- Pfister, A. (1992). Novel CMOS Schmitt trigger with controllable hysteresis. Electron. Lette., 28, 639-641. https://doi.org/10.1049/el:19920404 DOI: https://doi.org/10.1049/el:19920404
- Saini, S., Veeramachaneni, S., Kumar, A. M. & Srinivas, M.B. (2009). Schmitt trigger as an alternative to buffer insertion for delay and power reduction in VLSI interconnects. TENCON2009-2009 IEEE Region10 conferences1-5. https://doi.org/10.1109/TENCON.2009.5396104 DOI: https://doi.org/10.1109/TENCON.2009.5396104
- Saxena, A., Shrivastava, A. & Akashe, S. (2014). Design and performance evaluation of Schmitt trigger for nano scale CMOS. American scientific publishers, Quantum Matter 3 (1-4). https://doi.org/10.1166/qm.2014.1095 DOI: https://doi.org/10.1166/qm.2014.1095
- Steyaert, M. & Sansen, W. (1986). Novel CMOS Schmitt trigger. IEEE Transication. Electron Devices, 22(4), 203 - 204. https://doi.org/10.1049/el:19860142 DOI: https://doi.org/10.1049/el:19860142
- Wang, Z. (1991). CMOS adjustable Schmitt triggers. IEEE Transaction, Instrumentation, Measurement. 40(3), 601-605. https://doi.org/10.1049/el:19920404 DOI: https://doi.org/10.1049/el:19920404
- Weste, N. & Eshraghian, K. (1993). Principles of CMOS VLSI Design (A Systems Perspective), 2nd ed. Reading, MA: Addison Wesley.
References
Al-Sarawi, S. F. (2002). Low-power Schmitt trigger circuit. Electron. Letter. 38, 1009¬-1010. https://doi.org/10.1049/el:20020687 DOI: https://doi.org/10.1049/el:20020687
Dokic, B.L. (1984). CMOS Schmitt triggers. IEEE Electronic Circuits System, 131(5), 197- 202. https://doi.org/10.1049/ip-g-1.1984.0037 DOI: https://doi.org/10.1049/ip-g-1.1984.0037
Katyal, V., Geiger, R. L. & Chen, D. J. (2008). Adjustable Hysteresis CMOS Schmitt Trigger. IEEE International Symposium on Circuits and system, ISCAS, 1938-1941. DOI: https://doi.org/10.1109/ISCAS.2008.4541823
Khandelwal, S., Raj, B. & Gupta, R.D. (2013). Leakage Current and Dynamic Power Analysis Of Finfet Based 7T SRAM at 45nm Technology. International Arab Conference on Information Technology (ACIT’2013), Sudan University.
Mishra, V. & Akashe, S. (2014). Calculation of Power Delay Product and Energy Delay Product in 4-Bit FinFET Based Priority Encoder. Springer Proceedings, International Conference on Opto-Electronics and Applied Optics (IEM OPTRONIX-2014), Kolkata, India, pp. 283-289. https://doi.org/10.1007/978-81-322-2367-2_36 DOI: https://doi.org/10.1007/978-81-322-2367-2_36
Mishra, V. & Akashe, S. (2015). Calculation of Average Power, Leakage power, and leakage Current of FinFET based 4-bit Priority Encoder. Proceeding of Fifth IEEE International Conference on Advance Computing & Communication Technologies (ACCT), pp. 65-69, 21 Feb 2015, Rohtak, Haryana. https://doi.org/10.1109/ACCT.2015.82 DOI: https://doi.org/10.1109/ACCT.2015.82
Pedroni, V. A. (2005). Low-voltage high-speed Schmitt trigger and compact window comparator. Electron. Letter, 41(22), 1213 - 1214. https://doi.org/10.1049/el:20052799 DOI: https://doi.org/10.1049/el:20052799
Pfister, A. (1992). Novel CMOS Schmitt trigger with controllable hysteresis. Electron. Lette., 28, 639-641. https://doi.org/10.1049/el:19920404 DOI: https://doi.org/10.1049/el:19920404
Saini, S., Veeramachaneni, S., Kumar, A. M. & Srinivas, M.B. (2009). Schmitt trigger as an alternative to buffer insertion for delay and power reduction in VLSI interconnects. TENCON2009-2009 IEEE Region10 conferences1-5. https://doi.org/10.1109/TENCON.2009.5396104 DOI: https://doi.org/10.1109/TENCON.2009.5396104
Saxena, A., Shrivastava, A. & Akashe, S. (2014). Design and performance evaluation of Schmitt trigger for nano scale CMOS. American scientific publishers, Quantum Matter 3 (1-4). https://doi.org/10.1166/qm.2014.1095 DOI: https://doi.org/10.1166/qm.2014.1095
Steyaert, M. & Sansen, W. (1986). Novel CMOS Schmitt trigger. IEEE Transication. Electron Devices, 22(4), 203 - 204. https://doi.org/10.1049/el:19860142 DOI: https://doi.org/10.1049/el:19860142
Wang, Z. (1991). CMOS adjustable Schmitt triggers. IEEE Transaction, Instrumentation, Measurement. 40(3), 601-605. https://doi.org/10.1049/el:19920404 DOI: https://doi.org/10.1049/el:19920404
Weste, N. & Eshraghian, K. (1993). Principles of CMOS VLSI Design (A Systems Perspective), 2nd ed. Reading, MA: Addison Wesley.