A Study on Solution-Processed Y₂O₃ Films Modified by Atomic Layer Deposition Al₂O₃ as Dielectrics in ZnO Thin Film Transistor

Abstract

In this work, Y₂O₃–Al₂O₃ dielectrics were prepared and used in ZnO thin film transistor as gate insulators. The Y₂O₃ film prepared by the sol–gel method has many surface defects, resulting in a high density of interface states with the active layer in TFT, which then leads to poor stability of the devices. We modified it by atomic layer deposition (ALD) technology that deposited a thin Al₂O₃ film on the surface of a Y₂O₃ dielectric layer, and finally fabricated a TFT device with ZnO as the active layer by ALD. The electrical performance and bias stability of the ZnO TFT with a Y₂O₃–Al₂O₃ laminated dielectric layer were greatly improved, the subthreshold swing was reduced from 147 to 88 mV/decade, the on/off-state current ratio was increased from 4.24 × 10⁶ to 4.16 × 10⁸, and the threshold voltage shift was reduced from 1.4 to 0.7 V after a 5-V gate was is applied for 800 s.

1. Introduction

In recent years, metal oxide thin film transistors (TFT) have attracted a lot of attention due to their high transmittance, high current switching ratio, insensitivity to visible light, and technical advantages, such as solution processing and low temperature deposition. They are widely used in flat panel displays and large-scale integrated circuits and, thus, show a huge application value [1,2]. Among the various metal oxide TFTs, transparent ZnO-based TFTs have been extensively studied as a replacement for silicon-based TFTs in large area electronic displays [3,4,5]. In this regard, ZnO-based TFTs exhibit good electrical and optical properties such as high electron mobility, good uniformity, and excellent transparency to visible light, making them a promising candidate for practical application in next generation flat panel displays [6,7]. In this work, ZnO thin films in TFT were deposited by ALD technology.

As an important part of TFT, the gate dielectric layer plays an important role in the performance of TFT. With the reduction in the critical size of semiconductor devices, a traditional SiO₂ dielectric layer, which has a low dielectric constant, can no longer meet the requirements of device preparation due to the secondary effect becoming prominent [8]. Therefore, a new high-performance dielectric layer is developed to replace it. Therefore, high-k materials, such as ZrO₂ [9,10], HfO₂ [11], and TiO₂ [12], have received extensive attention from researchers. However, high-k materials are difficult to apply on a large scale due to their high cost, easy crystallization, large leakage current, and high surface roughness [13]. The interface modification method, i.e., the emergence of laminated dielectric layers, has better solved the problems faced by high-k materials, and further promoted the large-scale application of high-k dielectric layers. Waggoner et al. successfully prepared the ZrO₂–Al₂O₃ laminated dielectric layer and realized the regulation of its dielectric properties [14]. Chang et al. successfully applied the gate dielectric layer of the Al₂O₃/HfO₂/Al₂O₃ structure to the ZnO TFT. Compared with a single HfO₂ dielectric layer, its hysteresis has been significantly improved, and it has higher electrical stability [15]. Ding et al. reported that, by inserting Al₂O₃ as a modified layer into the IGZO TFT with ZrO₂ as the dielectric layer, the gate leakage current was obviously reduced and better transfer and output characteristics were obtained [12].

Y₂O₃ is a promising candidate for use as a gate insulator since it could present low leakage current, high breakdown voltage, and good high-temperature reliability due to both wide band gap (5–6 eV) and excellent thermal stability. Many research groups have studied IGZO transistors employing Y₂O₃ as gate insulator [16,17,18]. We prepared a Y₂O₃ dielectric layer by the sol–gel method and modified it by ALD Al₂O₃. The Y₂O₃ film prepared by the sol–gel method has many surface defects, resulting in a high density of interface states with the active layer in TFT, leading to poor stability of the devices. We modified it by atomic layer deposition (ALD) technology that deposited a thin Al₂O₃ film on the surface of the Y₂O₃ dielectric layer. This ALD technology has many advantages. For example, the prepared film has a uniform surface, high thickness controllability, excellent repeatability, and low deposition temperature [19]. At the meanwhile, an Al₂O₃ film is prepared by a direct spin-coating process to modify the Y₂O₃. This would make it clear that there is a distinct advantage of using an additional ALD layer rather than a direct spin-coating process. The performance of ZnO–Y₂O₃ (named ‘device A’) and ZnO–Y₂O₃–ALD and Al₂O₃ (named ‘device B’) TFT were examined to confirm the expected performance of Y₂O₃ and the effect of ALD Al₂O₃.

2. Experiments

A 0.2-M Y₂O₃ and 0.4-M Al₂O₃ precursor solution were synthesized by dissolving a certain amount of Y(CH₃COO)₃·xH₂O and Al(NO₃)₃·9H₂O in ethylene glycol methyl ether. After the precursor solution was placed in a magnetic stirrer and stirred for 10 min to completely dissolve the solute, ethanolamine was added as a stabilizer to avoid turbidity and precipitation of the precursor solution. The preparation process of precursor solution was carried out in a glove box filled with nitrogen to isolate water and oxygen in the air. The prepared precursor solution was stirred in a water bath heating pot with a magnetic stirrer at 60 °C for 2 h, and then aged at room temperature for 12 h to obtain homogeneous hydrolysis and the best viscosity.

Before depositing the film, the p-type Si substrate was ultrasonically cleaned in acetone, alcohol, and deionized water for 10 min to remove stains and grease. Then, the Si substrate was treated in an ozone and ultraviolet environment for 10 min to improve the hydrophobicity of the substrate surface and enhance the uniformity of film growth. Next, the Y₂O₃ precursor solution was dropped onto the Si substrate through a syringe, first spin-coated at a speed of 500 r/min for 5 s, and then at a speed of 3000 r/min for 30 s. This process was repeated three times to obtain a 60-nm-thick films. The Al₂O₃ precursor solution was spin-coated on it at a speed of 2000 r/min for 20 s to obtain a 10-nm-thick film. Then, the film was placed on a hot plate at 120 °C to cure for 10 min. The film was then placed in a muffle furnace and annealed at 400 °C for 2 h. Subsequently, an Al₂O₃ film of approximately 10 nm was deposited on another solution-processed 60-nm-thick Y₂O₃ film by ALD (TFS-200, Beneq) at 200 °C using trimethylaluminum and deionized water. Then, high-purity diethyl zinc (DEZ) and deionized water were used to deposit a 20-nm ZnO active layer at 150 °C on the dielectric layer, with a purge time of 5 s. Finally, Al films deposited by thermal evaporation were used as source/drain electrode of TFTs with channel width (W) = 1000 μm and channel length (L) = 200 μm, respectively. The schematic structure of the ZnO TFT with Y₂O₃–Al₂O₃ (ALD) as gate insulator are shown in Figure 1a.

The surface morphology of the films was characterized by atomic force microscope (AFM, nanonaviSPA-400 SPM, SII Nano Technology Inc. Chiba City, Japan). The AFM measurement mode used was a tapping mode. The parameters of the AFM tip (Tap150AL-G) were of a resonant freq. of 150 KHz and a force constant of 5 N/m. The measurement geometry was rectangle and the acquisition time was 4 min. The structure of Y₂O₃ film was analyzed by X-ray diffraction (XRD). The transfer characteristics were measured at room temperature by a semiconductor parameter analyzer (Keithley, 4200, Tektronix Inc, Beaverton, OR, USA).

3. Results and Discussion

In order to study the thermal decomposition characteristics of the precursor solution, we tested the thermogravimetric curve of the Y₂O₃ precursor solution by thermogravimetric analysis (TGA), as shown in Figure 1b. The test conditions are that the temperature rises from room temperature to 800 °C in an air environment, and the heating rate is 10 °C/min. It can be seen from the thermogravimetric curve that the precursor solution has a greater weight loss between room temperature and 120 °C, which is mainly caused by the decomposition and hydrolysis reaction of the precursor [20]. There is a small weight loss between 120 and 400 °C. The weight loss in this range is mainly caused by the conversion of related hydroxides into corresponding oxides through a dehydroxylation reaction [21]. When the temperature is higher than 400 °C, the weight of the precursor solution almost remains stable, indicating that the precursor solution has completely formed a dense oxide film. According to the analysis result of the thermogravimetric curve, we choose 400 °C as the annealing temperature of the film.

Figure 2a shows the XRD pattern of Y₂O₃ film. No obvious crystallization peak is observed in the spectrum, which indicates that the Y₂O₃ film prepared by the sol–gel method has an amorphous structure. Amorphous structure plays an important role in high-performance TFT [22]. Amorphous structure helps to form a film with high uniformity and smooth surface, provides a fast transport path for carriers, and is beneficial to large-size oxide TFTs. In order to test the transmittance of the Y₂O₃ film, we deposited a Y₂O₃ film on quartz glass. As shown in Figure 2b, the light transmittance of the Y₂O₃ film exceeds 90% in the visible light range. The results show that the Y₂O₃ film is suitable for the preparation of transparent electronic devices, and the film with high transmittance has potential in preparation of flexible and transparent devices.

As shown in Figure 3, the surface morphology of the Y₂O₃ dielectric layer and Y₂O₃–Al₂O₃ laminated dielectric layer was analyzed by AFM. Based on the AFM results, the root mean square roughness of the Y₂O₃, Y₂O₃–Al₂O₃ (ALD), and (c) Y₂O₃–Al₂O₃ (solution processed) laminated a dielectric layer are 1.08, 0.66, and 0.86 nm, respectively. The lower surface roughness value of the Y₂O₃–Al₂O₃ (ALD) laminated dielectric layer indicates that the surface morphology is the smoothest, which is critical to the formation of good interface contact between the dielectric layer and the active layer. Therefore, we choose Y₂O₃–Al₂O₃ (ALD) as a dielectric layer in the following part. Y₂O₃–Al₂O₃ (solution processed) will not be discussed.

By preparing capacitors based on Al/Y₂O₃/Si and Al/Al₂O₃-Y₂O₃/Si structures, the capacitance–frequency characteristic analyzer was used to test the relationship between the unit capacitance value and frequency of Y₂O₃ film and Y₂O₃–Al₂O₃ film, as shown in Figure 4a. The capacitance per unit area of the Y₂O₃ and Y₂O₃–Al₂O₃ dielectric layers measured at low frequency (20 Hz) are 162.9 and 131.3 nF/cm², respectively. The capacitance per unit area measured at high frequency (100 kHz) is 152.2 and 121.0 nF/cm². The capacitance per unit area of Y₂O₃ and Y₂O₃–Al₂O₃ dielectric layer films varies little with frequency (~8%). Figure 4b tests the leakage characteristics of the Y₂O₃ film and the Y₂O₃–Al₂O₃ film. The leakage currents of Y₂O₃ and Y₂O₃–Al₂O₃ dielectric layers are 1.1 × 10⁻⁷ and 4.5 × 10⁻⁸ A/cm² at a field strength of 2 MV/cm, respectively, and the breakdown electric field is 5 and 5.7 MV/cm, indicating that the Y₂O₃–Al₂O₃ laminated dielectric layer has better insulation properties than the Y₂O₃ dielectric layer.

The method of extracting field-effect mobility (μ) et al. of device parameters are described in our previous reports [23].

Table 1. Electrical properties of device A, B and compare with other TFTs.

Dielectric Layer	Method	Active Layer	Vth (V)	μ (cm2/Vs)	Ion/Ioff	SS (V/dec.)	Ref.
Y2O3–HfO2	RF-ALD	IGZO	1.1	3.3	107	0.180	[17]
Y2O3	ALD	IGZO	3.9	7.6	-	0.350	[18]
Y2O3–Al2O3	Spray pyrolysis	ZnO	-	34	105	-	[24]
SiO2–Al2O3	ALD	IGZO	8.67	6.03	109	0.230	[25]
HfO2	RF	ZnO	2.55	12.2	107	2.550	[26]
ZrO2	ALD	ZnO	0.1	36.8	107	0.069	[27]
Y2O3 (Device A)	solution	ZnO	3.64 ± 0.5	2.65 ± 1	~4.24 × 106	0.147 ± 0.01	This work
Y2O3–Al2O3 (Device B)	solution-ALD	ZnO	2.84 ± 0.85	7.12 ± 1	~4.16 × 108	0.088 ± 0.01

summarizes the electrical performance parameters of device A, B and compares them with other TFTs. It can be seen from the table that the Al₂O₃ intermediate layer greatly improves the performance of ZnO TFT. Specifically, the μ increased from 2.65 to 7.12 cm²/Vs, the on/off-state current ratio (I_on/I_off) increased from 4.24 × 10⁶ to 4.16 × 10⁸, and the subthreshold swing (SS) decreased from 0.147 to 0.088 V/decade. Positive bias voltage stability (PBS) is very important for the practical application of oxide TFT devices. Figure 5a,b show the positive bias voltage of device A and B, respectively. The test condition of PBS is a forward voltage of 5 V under room temperature and dark environment, and the duration is 800 s. Both of the two devices shift towards a positive direction with increasing PBS time, which is attributed to the numerous vacancies at the interface between the dielectric and the channel layer or the full bulk region [10]. The electron trapping occurred at the channel–insulator interface.

Figure 6 shows the threshold voltage shift (ΔV_th) of device A and B under different stress times. The values of ΔV_th for the device A and B are 1.4 and 0.7 V, respectively. The smaller ΔV_th indicates that the Y₂O₃–Al₂O₃ laminated dielectric layer has a lower surface defect state density. The ∆V_th dependence of time agrees with a stretched-exponential equation:

$$\Delta V_{\mathrm{th}}=\left(V_{\mathrm{GS}}-V_{\mathrm{th}}\right)\left\{1-\exp \left[-{\left(\frac{t}{\tau }\right)}^{\beta }\right]\right\}$$

(1)

where V_th is the initial threshold voltage, τ is the carrier trapping time, and β is the stretch index. The τ values of the Y₂O₃ dielectric layer and the Y₂O₃–Al₂O₃ laminated dielectric layer of the ZnO TFT extracted from the equation are 1.60 × 10⁵ and 7.47 × 10⁵ s, and the β value is 0.21 and 0.41, respectively. An oxide TFT device with a high τ value has better stability, so the failure time of a ZnO TFT device with an Y₂O₃–Al₂O₃ laminated dielectric layer is prolonged.

4. Conclusions

In this work, an Y₂O₃ dielectric layer was prepared by the sol–gel method, and a ZnO TFT device with an Y₂O₃ dielectric layer and an Y₂O₃–Al₂O₃ laminated dielectric layer were prepared by combining with ALD technology. It is found that, compared with the ZnO TFT device with the Y₂O₃ dielectric layer, the electrical performance and bias stability of ZnO TFT with the Y₂O₃–Al₂O₃ laminated dielectric layer have been greatly improved. For example, the SS dropped from 147 mV/decade to 88 mV/decade, the I_on/I_off ratio increased from 4.24 × 10⁶ to 4.16 × 10⁸, and the ΔV_th was reduced from 1.4 to 0.7 V after a 5 V gate voltage applied for 800 s. The improvement of the electrical performance and bias stability of ZnO TFT is attributed to the lower interface trap state density of the Y₂O₃–Al₂O₃ laminated dielectric layer.