Full-Bridge Active-Clamp Forward-Flyback Converter with an Integrated Transformer for High-Performance and Low Cost Low-Voltage DC Converter of Vehicle Applications

Abstract

This paper presents a full-bridge active-clamp forward-flyback (FBACFF) converter with an integrated transformer sharing a single primary winding. Compared to the conventional active-clamp-forward (ACF) converter, the proposed converter has low voltage stress on the primary switches due to its full-bridge active-clamp structure, which can leverage high performance Silicon- metal–oxide–semiconductor field-effect transistor (Si-MOSFET) of low voltage rating and low channel resistance. Integrating forward and flyback operations allows the proposed converter to have much lower primary root mean square (RMS) current than the conventional phase-shifted-full-bridge (PSFB) converter, while covering wide input/output voltage range with duty ratio over 0.5. The proposed integrated transformer reduces the transformer conduction loss and simplify the secondary structure of the proposed converter. As a result, the proposed converter has several advantages: (1) high heavy load efficiency, (2) wide input voltage range operation, (3) high power density with the integrated transformer, and (4) low cost. The proposed converter is a very promising candidate for applications with wide input voltage range and high power, such as the low-voltage DC (LDC) converter for eco-friendly vehicles.

1. Introduction

Nowadays, eco-friendly vehicles such as hybrid electric vehicle and electric vehicle have been researched and developed to satisfy the strengthened CO₂ emission regulations as well as to increase fuel economy [1,2,3]. A lot of power conversion systems have been studied for eco-friendly vehicles. These power conversion systems require not only a high efficiency to improve the fuel economy but also a high power density because those are installed in the engine and trunk rooms of eco-friendly vehicles. Moreover, the price of eco-friendly vehicles is much higher than that of the traditional vehicles due to additional power conversion systems, i.e., drive motor, inverter, converters, and battery. Therefore, reducing the production cost is also one of the most important design considerations for eco-friendly vehicles. Furthermore, the power consumption caused by electronic devices of vehicles has been rapidly increased due to the remarkable improvement of information technology and development of electronic system such as advanced driver assistance system (ADAS), motor drive steering system (MDPS), traction control system (TCS), information devices, etc. [4].

To supply power to electronic devices of vehicles, a LDC converter that charges low voltage (LV) battery (e.g., 13.6 V) with the energy stored in high voltage (HV) battery (e.g., 300 V) is commonly used in eco-friendly vehicles. The LV battery is usually controlled to maintain its nominal voltage. Namely, the LDC converter should be designed to cover wide input voltage range of the HV battery. Due to the increased power consumption of high-performance electronic devices (ADAS, MDPS, and so on) in vehicles, the discharging current of the LV battery has been increased. Accordingly, to maintain the LV battery in normal range, the nominal output current of the LDC converter, i.e., charging current of the LV battery, has been also continuously increased. As a result, it is getting important for the LDC converter to achieve higher heavy load efficiency. Currently, plug-in hybrid electric vehicles (PHEVs) usually adopt a HV battery with 240–413 V (nominal 360 V), and HEVs do a HV battery with 200–310 V operating range (nominal 270 V). Both uses approximated 13.6 V LV battery. In addition, the LDC converter is designed up to 2 kW meaning very high output current of 140–160 A.

In order to achieve high efficiency and high power density under wide input voltage range and high output current specifications, the conventional LDC converter adopts a phase-shifted full-bridge (PSFB) converter as shown in Figure 1 due to the zero-voltage switching (ZVS) characteristic and twice powering operation in one switching period of the PSFB converter [5,6,7,8,9]. However, since the operating duty ratio at the nominal input voltage is far small, the PSFB converter has large circulating current during freewheeling periods as shown in Figure 1b, which causes significant high conduction loss at heavy load condition. Furthermore, the PSFB converter has large system volume because of two magnetic components (transformer and output inductor shown in Figure 2b), which must be firmly fixed by using additional bulky devices, and large size of snubber circuits to constraint voltage stresses on the secondary diodes. As a result, the conventional PSFB converter makes difficult to minimize the size of the power control unit (PCU) shown in Figure 2a which includes an inverter, LDC converter, and control board.

Many DC/DC topologies with low circulating current have been developed to reduce the conduction loss of the conventional PSFB converter [5,6,7,8,9,10,11]. The converter presented in [7] reduces the circulating current of the PSFB converter by using large resonant inductance. However, it has serious disadvantages of two additional switches and large volume of auxiliary inductor, which results in increasing the volume and cost of the LDC converter. The converters shown in [8,11] can obtain small circulating current by using an additional capacitor in the primary side or a coupled inductor in the secondary side. However, an additional capacitor in [8] cannot be small to handle high voltage stress and high current stress. A coupled inductor in [11] requires larger core size compared to a discrete output inductor to keep the same power loss. Moreover, these converters should have two separate magnetic components. Therefore, these converters are still limited in improving power density of the LDC converter.

To complement large circulating current of the conventional PSFB converter, many active-clamp-forward (ACF) converters have been studied [12,13,14,15,16,17,18,19]. These ACF converters have advantages of the zero circulating current and low number of switches, which results in lower conduction loss compared to the conventional PSFB converter. However, despite of low conduction loss, these converters suffer from high voltage stress on the primary switches, which becomes far worse taking into account wide input voltage range. As a result, the ACF converters in [12,13,14,15,16,17,18,19] should use low performance of Si-MOSFETs increasing conduction loss and switching loss. In order to improve this drawback and achieve high efficiency, the ACF converters can adopt silicon-carbide (SiC) MOSFETs which has high voltage rating, small on-resistance, and small parasitic capacitance. However, using SiC-MOSFETs significantly increases the cost of LDC converter. Moreover, the ACF converters still use two magnetic components increasing the volume of converter. To relieve the voltages stress on the primary switches of the ACF converters, three-switch ACF converters were researched and developed [14,15]. However, one of three switches still suffer from high voltage stress. Moreover, the converters in [14,15] should use complex driving circuits and two magnetic components. To reduce the number of the magnetic components, ACF converters with an integrated magnetic were represented as shown in Figure 3 [16,17]. Although these converters utilize only one integrated magnetic, the primary and secondary windings are wound the outside of the core shown in Figure 3, which requires additional shield and structure causing the extra cost and volume to minimize the adverse effect of electromagnetic interference (EMI). As a result, the conventional and previously studied ACF converters have limitations in commercialization especially for vehicle applications.

In this paper, the full-bridge active-clamp-forward-flyback (FBACFF) converter adopting an integrated transformer sharing single primary winding is proposed for the LDC converter of vehicle applications. The proposed FACFF converter has the following advantages compared to conventional topologies: (1) active-clamp structure of the proposed converter minimizes the circulating current of the conventional PSFB converter, which results in higher efficiency; (2) full-bridge structure of the proposed converter relieves high voltage stress on the primary switches of the conventional ACF converter and thus the proposed converter can adopt cost-competitive Si-MOSFETs and achieve high efficiency without high-cost SiC-MOSFETs; (3) it can have lower diode voltage stress than the PSFB converter, which enables the proposed converter to use high-current rating diodes; and (4) a proposed single integrated transformer reduces volume and cost of the LDC converter. The primary and secondary windings of the proposed integrated transformer are wound inside of the transformer core, which enables the proposed converter not only to minimize the adverse effect of EMI but also to eliminate additional snubber circuits due to small leakage inductance. As a result, the proposed converter can achieve high efficiency, high power density, and low cost compared to the conventional topologies. In order to verify the validity of the proposed converter, a prototype with 200–310 V input and 1.8 kW (13.6 V/130 A) output was built and the experimental results are presented compared with the conventional PSFB converter which is the most widely used in the commercialized LDC converter.

2. Operational Principle

Figure 4 and Figure 5 show the circuit diagram and operational key waveforms of the proposed converter, respectively. In the proposed converter, the primary switches Q₁ and Q₄ are turned on at the same time to transfer the power from the input to the output through the forward transformer (T_for). Meanwhile, the switches Q₂ and Q₃ are driven complementarily with Q₁ and Q₄ to reset T_for as well as to deliver the energy stored in the flyback transformer (T_fly) into the output. For the sake of analysis, several assumptions are made as follows:

(1)

all parasitic components except for those specified in Figure 4 are ignored;

(2)

a clamp capacitor (C_C) is large enough to be considered as a constant voltage source (V_Cc );

(3)

the output voltage (V_O) is constant;

(4)

the transformer turns ratio (n) of the forward and flyback transformers (T_for and T_fly) is N/1, where N is the number of the primary winding.

The proposed converter shows 10 operational modes during one switching period and each mode is explained with its topological state as shown in Figure 6.

Mode 1 [t₀–t₁, Figure 6a]: At time t₀, after the commutation of the secondary diodes (D₁ and D₂) ends and the leakage inductor current (i_Llkg) reaches to the magnetizing current of T_fly (i_Lm,fly), nV_O, and V_S–nV_O are applied to the magnetizing inductance of T_for (L_m,for) and the magnetizing inductance of T_fly (L_m,fly), respectively. As a result, i_Lm,for, i_Lm,fly, and i_Llkg are linearly increased. The power is transferred to the output through Q₁, Q₄, integrated transformer, and D₁ at this mode. From the voltage across transformers, i_Lm,for, i_Lm,fly, and current of D₁ (i_D1) are expressed as follows:

$$i_{Lm,for}(t)=i_{Lm,for}(t_0^{})+\frac{n{V}_O}{L_{m,for}}(t-t_0),$$

(1)

$$i_{Lm,fly}(t)=i_{Llkg}(t)=i_{Lm,fly}(t_0)+\frac{V_S-n{V}_O}{L_{m,fly}}(t-t_0),$$

(2)

$$i_{D1}(t)=\frac{i_{Lm,fly}(t)-i_{Lm,for}(t)}{n}.$$

(3)

Mode 2 [t₁–t₂, Figure 6b]: After t₁, Q₁ and Q₄ are turned off, and mode 2 begins. i_Lm,fly is the same as the reflected load current (I_O/n) charges C_oss1 and C_oss4 and discharges C_oss2 and C_oss3. Thus, the voltages across Q₁ and Q₄ (v_ds1 and v_ds4) simultaneously increase to V_S/2, and the voltages across Q₂ and Q₃ (v_ds2 and v_ds3) decrease to V_S/2 and V_Cc–V_S/2, respectively. Thus, the voltage across L_m,fly (v_Lm,fly) is decreased from V_S–nV_O to –nV_O so that the sum of the voltages across L_m,fly and L_m,for is zero at the end of this mode.

Mode 3 [t₂–t₃, Figure 6c]: v_Lm,fly reaches –nV_O at t₂, D₁, and D₂ start to conduct. The leakage inductance of the integrated transformer (L_lkg) resonates with parasitic output capacitors (C_oss1, C_oss2, C_oss3, and C_oss4). The equivalent circuit of this mode is illustrated in Figure 7a. From this Figure, the energy stored in L_lkg charges C_oss1 and C_oss4 and discharges C_oss2 and C_oss3. Thus, v_ds1 and v_ds4 are increased, and v_ds1 is clamped to V_S. Meanwhile, v_ds2 and v_ds3 are decreased to zero and V_Cc–V_S, respectively.

Mode 4 [t₃–t₄, Figure 6d]: After v_ds2 reaches to zero at t₃, mode 4 starts. In this mode, only C_oss3 and C_oss4 are continuously discharged and charged by the resonance with L_lkg, respectively. v_ds3 decreases to zero and v_ds4 increases to V_Cc. The equivalent circuit of this mode is depicted in Figure 7b. Based on Mode 3 and Mode 4, the ZVS condition of Q₂ and Q₃ are:

$$\frac{1}{2}{L}_{lkg}{i}_{Llkg}^2(t_2)\ge \frac{1}{2}{C}_{oss}{\left(V_{Cc}+\frac{V_S}{2}\right)}^2,$$

(4)

where C_oss = C_oss1 = C_oss2 = C_oss3 = C_oss4.

Mode 5 [t₄–t₅, Figure 6e]: At time t₄, v_ds2 and v_ds3 are 0 V, and i_Lkkg flows through body diodes of Q₂ and Q₃. As a result, Q₂ and Q₃ can achieve the ZVS operation. Moreover, since the sum of v_Lm.for and v_Lm.fly is zero, –V_Cc is applied to L_lkg. Thus, i_Llkg is linearly decreased to i_Lm.for with the commutation between D₁ and D₂. i_Llkg at this mode is:

$$i_{Llkg}(t)=i_{Llkg}(t_4)-\frac{V_{Cc}}{L_{lkg}}(t-t_4).$$

(5)

From (5), the commutation period, where the input power is not transferred to the output, can be approximated as L_lkgI_O/(nV_Cc).

Mode 6 [t₅–t₆, Figure 6f]: After the commutation of D₁ and D₂ ends, the voltage on D₁ reaches V_Cc/n and the reset operation of T_for starts by v_Lm,for (=nV_O–V_Cc). Meanwhile, the energy stored in T_fly is delivered to the output because v_Lm,fly is –nV_O. As a result, i_Lm,for, i_Lm,fly, and current of D₂ (i_D2) are expressed as follows:

$$i_{Lm,for}(t)=i_{Lm,for}(t_5)-\frac{V_{Cc}-n{V}_O}{L_{m,for}}(t-t_5),$$

(6)

$$i_{Lm,fly}(t)=i_{Llkg}(t)=i_{Lm,fly}(t_5)-\frac{n{V}_O}{L_{m,fly}}(t-t_5),$$

(7)

$$i_{D2}(t)=\frac{i_{Lm,fly}(t)-i_{Lm,for}(t)}{n}.$$

(8)

Mode 7 [t₆–t₇, Figure 6g]: After t₆, Q₂ and Q₃ are turned off, and mode 7 starts. i_Lm,for charges C_oss2 and C_oss3 and discharges C_oss1 and C_oss4. Thus, v_ds2 and v_ds3 are increased to V_Cc/2. v_Lm,for is increased from V_Cc–nV_O to nV_O. On the other hand, v_ds1 and v_ds4 are decreased to V_S–V_Cc/2 and V_Cc/2, respectively. This mode ends when v_Lm,for reaches to nV_O and the sum of the voltage on the magnetizing inductances is zero.

Mode 8 [t₇–t₈, Figure 6h]: v_Lm,for reaches nV_O at t₇ and D₁ and D₂ conduct. Thus, L_lkg resonates with C_oss1, C_oss2, C_oss3, and C_oss4. The equivalent circuit of this mode is illustrated as in Figure 7. From this Figure, the energy stored in L_lkg charges C_oss2 and C_oss3 and discharges C_oss1 and C_oss4. Thus, v_ds2 and v_ds3 are increased and v_ds2 is clamped to V_S, whereas v_ds1 and v_ds4 are decreased to zero and V_Cc–V_S, respectively.

Mode 9 [t₈–t₉, Figure 6i]: After v_ds1 reaches to zero at t₈, Mode 9 begins. In this mode, only C_oss3 and C_oss4 are continuously charged and discharged in accordance with the resonance with L_lkg. As a result, v_ds4 is decreased to zero and v_ds3 is increased to V_Cc. The equivalent circuit of this mode is depicted in Figure 7d. Based on Mode 8 and Mode 9, the ZVS condition of Q₁ and Q₄ is:

$$\frac{1}{2}{L}_{lkg}{i}_{Llkg}^2(t_7)\ge \frac{1}{2}{C}_{oss}{\left(V_{Cc}+\frac{V_S}{2}\right)}^2.$$

(9)

Mode 10 [t₉–t₀’, Figure 6j]: After v_ds1 and v_ds4 become 0 V, i_Llkg flows through body diodes of Q₁ and Q₄. Thus, Q₁ and Q₄ can achieve the ZVS condition. Moreover, similar to Mode 5, since the sum of v_Lm.for and v_Lm.fly is zero, V_S is applied to the L_lkg. Thus, i_Llkg is linearly increased to i_Lm.flly with the commutation between D₁ and D₂. i_Llkg at this mode is:

$$i_{Llkg}(t)=i_{Llkg}(t_9)+\frac{V_S}{L_{lkg}}(t-t_9).$$

(10)

From (10), the commutation period can be derived as L_lkgI_O/(nV_S).

3. Analysis and Design Consideration

In this chapter, characteristics of the proposed converter are analyzed. Moreover, the design consideration of the proposed integrated transformer will be discussed to achieve high power density and simple secondary structure of the proposed converter.

3.1. DC Conversion Ratio

For simplifying analysis of the proposed converter, L_lkg and the dead time among Q₁–Q₄ are ignored. In Figure 8, V_S–nV_O and –nV_O are applied to the L_m,fly during DT_S and (1–D)T_S, respectively. Thus, the DC conversion ratio can be approximated as in (12) by the voltage second balance of L_m,fly.

$$\left(V_S-n{V}_O\right)D{T}_S-n{V}_O\left(1-D\right)T_S=0,$$

(11)

$$\frac{V_O}{V_S}=\frac{D}{n}.$$

(12)

Moreover, based on the voltage second balance of L_m,for and Figure 8, V_Cc can be achieved as follows:

$$n{V}_{O}D{T}_S-\left(V_{Cc}-n{V}_O\right)\left(1-D\right)T_S=0,$$

(13)

$$V_{Cc}=\frac{n{V}_O}{1-D}=\frac{D}{1-D}{V}_S.$$

(14)

From Figure 9, the DC conversion ratio and V_Cc can be recalculated by considering the duty loss1 (D_L1) caused by the commutation operation when the Q₁ and Q₄ are turned on, the duty loss2 (D_L2) resulting from the commutation operation at the Q₂ and Q₃ turn-on instant as follows:

$$\frac{V_O}{V_S}=\frac{1}{n}\left(D-D_{L1}\right)\frac{L_{m,for}}{L_{m,for}+L_{lkg}},$$

(15)

$$V_{Cc}=\frac{n{V}_O}{1-D-D_{L2}}\frac{L_{m,for}+L_{lkg}}{L_{m,for}}=\frac{D-D_{L1}}{1-D-D_{L2}}{V}_S=\frac{D}{1-D}{V}_S,$$

(16)

where I_O is the output load current, f_S is the switching frequency, D_L1 is L_lkgI_Of_S/nV_S, and D_L2 is L_lkgI_Of_S/nV_Cc.

Therefore, the DC conversion ratio of the proposed converter is almost the same as that of the conventional ACF converter.

3.2. Output Current Ripple

The conventional isolated converters, such as PSFB and ACF converters, generally adopt two magnetics: (1) transformer to transfer power from the input to the output and (2) output inductor to control the output current ripple and output voltage ripple. Meanwhile, one integrated transformer of the proposed converter can play role as two traditional magnetics. T_for of the integrated transformer operates as the transformer of the conventional isolated converter and T_fly plays role as the output inductor of the conventional converters. In addition, as shown in Figure 9, the difference of i_Lm.for and i_Lm.fly is reflected to the output current. As a result, the magnitude of L_m,for and L_m,fly determines the output current ripple and output voltage ripple. From Figure 9, the output current ripples can be represented as in (17) and (18). The maximum output current ripple can be decided on the larger value between (17) and (18):

$$\Delta I_{O1}=\left|\left(\frac{k{V}_S-n{V}_O}{L_{m,fly}}-\frac{n{V}_O}{L_{m,for}}\right)n\left(D-D_{L1}\right)T_S\right|=\left|\left(\frac{k{V}_S-n{V}_O}{L_{m,fly}}-\frac{n{V}_O}{L_{m,for}}\right)\frac{k{n}^2{V}_O{T}_S}{V_S}\right|,$$

(17)

$$\Delta I_{O2}=\left|\left(\frac{-n{V}_O}{L_{m,fly}}-\frac{n{V}_O-k{V}_{Cc}}{L_{m,for}}\right)n\left(1-D-D_{L2}\right)T_S\right|=\left|\left(\frac{-n{V}_O}{L_{m,fly}}-\frac{n{V}_O-k{V}_{Cc}}{L_{m,for}}\right)\frac{k{n}^2{V}_O{T}_S}{V_{Cc}}\right|.$$

(18)

where k = L_m,for/(L_m,for + L_lkg).

Therefore, L_m,fly and L_m,for of the integrated transformer in the proposed converter should be adequately designed and chosen to satisfy the requirement of the output current and voltage ripples.

3.3. Transformer Design and Core Loss

The proposed converter with the integrated transformer shown in Figure 10 can minimize the number of the magnetic components through the integration of T_for and T_fly. Moreover, the integrated transformer enables the proposed converter to simplify the secondary side without snubber circuits for the secondary diodes. To implement an integrated transformer, various research and studies have been conducted [16,17]. However, these methods have several disadvantages such as large conduction losses due to separate primary and secondary windings and EMI problem caused by the windings wound outside the core, which requires additional bulky and expensive shield to reduce the adverse effect of the EMI.

In this paper, by using a characteristic that the primary currents of the forward and flyback transformers are the same, an integrated transformer for T_for and T_fly is proposed where two cores are separate and share the primary winding. In Figure 10, both the primary winding and secondary busbar are wound inside the core. As a result, the proposed integrated transformer can reduce the length of the transformer windings than those of the conventional integrated transformers in [16,17], which results in lower conduction loss of the transformer. Moreover, due to the windings wound inside the core, the proposed integrated transformer can have better EMI characteristics than the conventional integrated transformers [16,17]. Therefore, no additional shield is required in the proposed converter. In addition, as shown in Figure 10b, it is noted that the proposed converter can significantly simplify the secondary rectifier structure because the secondary busbar is directly connected to the output capacitor, which results in higher power density. Furthermore, there is no flux interference because two cores are separate from each other.

The flux density of the proposed integrated transformer can be simply calculated by considering its operation. When Q₁ and Q₄ are turned on, D₁ conducts and the power is transferred to the output through T_for. At that time, T_fly stores energy since D₂ is reverse biased and there is no current on T_fly and D₂. Whereas, when Q₂ and Q₃ are turned on, D₂ conducts. Thus, the energy stored in T_fly starts to be transferred to the output through T_fly and D₂, while T_for is reset by V_Cc. During these two periods, the flux variations of both cores (T_for and T_fly) can be expressed as follows:

$$\Delta B_{for}=\frac{\left(D+D_{L2}\right)n{V}_O{T}_S}{N_P{A}_{e,for}},$$

(19)

$$\Delta B_{fly}=\frac{\left(1-D+D_{L1}\right)n{V}_O{T}_S}{N_P{A}_{e,fly}},$$

(20)

where N_P is the number of primary windings of the integrated transformer and A_e,for and A_e,fly are the effective cross-section area of each core.

To analyze the core loss of the proposed integrated transformer, the improved generalized Steinmetz equation (IGSE) can be adopted because the flux variations of both cores are not sinusoidal. The transformer core loss based on the IGSE can be expressed as follows:

$$P_{core}=\frac{1}{T}{\displaystyle {\int }_0^T{k}_i{\left|\frac{dB}{dt}\right|}^{\alpha }(}\Delta B{)}^{\beta -\alpha }dt,$$

(21)

where ΔB is the peak-to-peak flux variation, and

$$k_i=\frac{k}{{(2\pi )}^{\alpha -1}{\displaystyle {\int }_0^{2\pi }{\left|\cos \theta \right|}^{\alpha }{2}^{\beta -\alpha }d\theta }},$$

(22)

where parameters k, α, and β are the same parameters as used in the Steinmetz equation [20].

Assuming that the transformer turns the ratio of the proposed and conventional integrated transformers the same way, the core loss of the proposed integrated transformer is the same as that of the conventional integrated transformer for the ACF converters. Meanwhile, the proposed integrated transformer can have slightly larger core loss than the conventional PSFB converter with a transformer and output inductor. This is because the turns-ratio of the proposed integrated transformer is restricted due to the shared primary windings. Thus, the number of primary windings of the proposed integrated transformer can be lower than that of the transformer and output inductor in the conventional PSFB converter, which can increase the core loss of the proposed converter compared to the conventional PSFB converter. Since ΔI_O is determined by the L_m,for and L_m,fly, relatively small L_m,for and L_m,fly should be designed to satisfy the requirement of ΔI_O. Due to the relatively larger core loss and magnetizing current, the proposed converter may have lower light load efficiency than the conventional PSFB converter. On the other hand, the proposed integrated transformer results in high heavy load efficiency because single primary windings and optimized busbar structure decrease the conduction loss caused by the output current. As mentioned in introduction section, the importance of heavy load efficiency in eco-friendly vehicles has been increasing more than before as the electric load of the vehicle has considerably increased. Therefore, the proposed integrated transformer is appropriate for the LDC converter of eco-friendly vehicles. Furthermore, the proposed integrated transformer not only reduces the volume of the converter but also achieves a high price competitiveness due to the concise secondary rectifier structure as shown in Figure 10b.

3.4. Conduction Loss and Voltage Stresses on Switches and Diodes

For the sake of analysis, it is assumed that (1) L_m,for and L_m,fly are large enough to ignore the effect of the magnetizing current during a switching period and (2) L_lkg is small enough to neglect the effect of the commutation period. Based on this assumption, RMS currents and voltage stress on the primary switches and secondary diodes can be derived for the conventional PSFB converter, conventional ACF converter, and proposed converter (

Table 1. Components stresses comparison among the conventional and proposed converters.

Stress Type	PSFB	ACF	Proposed Converter
RMS currents on switches	Q1-Q4:$\frac{I_O}{n\sqrt{2}}$	Qmain: $\frac{I_O}{n}\sqrt{D}$ Qaux: –	Q1, Q4:$\frac{I_O}{n}\sqrt{D}$ Q2, Q3: –
Voltage stress on switches	Q1–Q4:$V_S$	Qmain: $\frac{1}{1-D}{V}_S$ Qaux: $\frac{1}{1-D}{V}_S$	Q1, Q2: $V_S$ Q3, Q4: $\frac{D}{1-D}{V}_S$
Voltage stresses on diodes	D1, D2:$\frac{2V_S}{n}$	D1: $\frac{D}{n(1-D)}{V}_S$ D2: $\frac{V_S}{n}$	D1: $\frac{D}{n(1-D)}{V}_S$ D2:$\frac{V_S}{n}$

). From Table 1, it can be seen that the proposed converter has negligible RMS currents on Q₂ and Q₃, inducing the ignorable conduction loss. Thus, the conduction loss on primary switches is much smaller than that of the conventional PSFB converter and this tendency becomes larger as the output current goes to heavier load condition.

Due to the full-bridge active clamp structure, the proposed converter can achieve lower maximum voltage stresses on primary switches (Q₁ and Q₂: 310 V, Q₃ and Q₄: 238.6 V under experimental conditions) compared to the conventional ACF converter (Q_main and Q_aux: 477.7 V). Thus, considering a 30% voltage margin, the proposed converter can adopt Si-MOSFETs with low cost and low on-resistance rather than SiC-MOSFETs having high cost and high voltage rating characteristics (

Table 2. Price comparison of the primary switches among the conventional and proposed converters.

Price List	PSFB	ACF	Proposed Converter
Primary switch Part number /Price ($)	Q1–Q4: IPW60R105/3.37	Qmain: C3M0065090/9.375 Qaux: C3M0120090/6.025	Q1, Q4: IPW60R080/3.59 Q2, Q3: IPW60R190/1.74
Total price of primary switches ($)	13.48	15.4	10.66

). Moreover, the proposed converter reduces the maximum voltage stresses on D₁ and D₂ (D₁: 29.8 V, D₂: 38.8 V without considering voltage ringing under experimental conditions) than the conventional PSFB converter (D₁ and D₂: 62 V). Therefore, the proposed converter can utilize low voltage and high current rating diodes without bulky and lossy snubber circuit.

4. Experimental Results

To prove the validity of the proposed converter, a 1.8 kW prototype shown in Figure 11a was built with the specification of V_S = 200–310 V, V_O = 13.6 V, f_S = 125 kHz at 200 V input – 150 kHz at 310 V input. We also implemented a conventional PSFB converter.

Table 3. Design Parameters.

Components	Conventional PSFB	Proposed Converter
Primary Switch	IPW60R105, 4 EA (600 V, 105 mΩ)	Q1, Q4: IPW60R080 (600 V, 80 mΩ) Q2, Q3 : IPW60R190 (600 V, 190 mΩ)
Secondary diode	STPS40170, 6 EA (170 V, 40 A, VF = 0.79 V)	M80QZ12N, 2 EA (120 V, 160 A, VF = 0.78 V)
Clamp capacitor	–	PCPW225 MKP (630 V, 1 uF)
Transformer	Core: PQ4730 Lm = 140 uH, Llkg = 1.7 uH Np: Ns = 10:1	Core: PQ6640 custom Lm,for = 50 uH, Lm,fly = 40 uH Llkg = 5 uH, Np: Ns = 8: 1
Output inductor	Core: EER6028LO = 1.7 uH, 5 turns	–
Output capacitor	MLCC: 17 uF × 4 EA	MLCC: 22 uF × 6 EA

summarizes the details of two prototypes. In this chapter, the commercialized PSFB converter was designed for IONIQ HEV (made by HYUHNDAI motor company) and is used as the conventional converter to compare the performance of the proposed converter.

To regulate the output voltage, as shown in Figure 11b, the proposed converter used a DSP that is TMS320F28069PZT with 90 MHz clock frequency and 12-bit analog to digital conversion module. The DSP is used to implement the output voltage control and the switching frequency variation. The duty to output voltage transfer function of the proposed converter can be derived like a buck converter as follows:

$$G_{vd}(s)=\frac{V_O}{D}\frac{1}{\frac{L_{m,fly}{C}_O}{n^2\gamma }{s}^2+\frac{L_{m,fly}}{n^2\gamma R_O}+1},$$

(23)

where γ is 1 + L_m,fly/L_m,for.

The loop gain (T_v(z)) of the proposed converter adopting the voltage compensator is illustrated in Figure 12. The voltage compensator (G_vc(z)) was designed for minimum 360 Hz bandwidth and 45° phase margin for the prototype of this paper.

In addition, since the DSP is placed in the secondary side, the pulse transformer which can transfer gate signals from the secondary side to the primary side is implemented. In addition, for measuring the performance of the conventional and proposed converters, NFES2000S is used as an input power supply, Chroma DC Electronic load 63203 as an output electronic load, YOKOGAWA WT1600 as an input power analyzer, FLUKE 45A digital multi-meter for the output voltage and current measuring, and Wave-runner 64xi TELEDYNE LECROY to capture the experimental waveforms.

Figure 13 shows the experimental waveforms of the proposed converter at the nominal input voltage (V_S = 270 V) and full-load condition with the 150 kHz switching frequency. As shown in Figure 13a, due to the ACF structure, there is no circulating current and only small commutation current occurs during the switch transition. Moreover, voltage stresses on the primary switches of the proposed converter is far lower than 650 V which is general breakdown voltage of high-performance Si-MOSFETs. As a result, the primary conduction loss of the proposed converter can be considerably reduced compared to the conventional PSFB converter. Moreover, the propose converter cuts the production cost by utilizing Si-MOSFETs and the integrated transformer with single and inside wounded primary and secondary windings.

Figure 14 and Figure 15 present the key experimental waveforms at the minimum and maximum input voltage conditions under the full load condition. As shown in Figure 14, in the minimum input voltage condition (V_S = 200 V), since the maximum switch voltage stresses are determined by the actual duty ratio that is sum of the effective duty ratio and the duty loss during the commutation period, the switching frequency varies from 150 kHz to 125 kHz at the minimum input voltage condition to reduce the ratio of the commutation period in the total switching period. As a result, the voltage stresses on the primary switches are well restricted near 400 V, and the secondary diode voltage stresses are under 100 V. Since the duty ratio (D) of the proposed converter can be designed to be over 0.5, the proposed converter well regulates the output voltage at the minimum input voltage condition with D = 0.605. Moreover, as can be seen in Figure 15, the voltage stresses on the switches and diodes are under 400 V and 100 V in the maximum input voltage condition (V_S = 310 V). Although the voltage stresses on the switches and diodes varies according to the input voltage conditions, all of them are well controlled and restricted to be suitable for high performance Si-MOSFET with low cost and low on-resistance. Furthermore, the ZVS operation of the proposed converter is achieved even in the worst-case condition such as the high input voltage and full-load conditions shown in Figure 16a. Figure 16b shows the output voltage ripple of the proposed converter. The maximum output voltage ripple is under 500 mV regardless of the input voltage and load conditions (500 mV is the output voltage ripple requirement of LDC converter for vehicle applications). This verifies that the magnetizing inductances of the proposed integrated transformer is adequately designed and chosen. Thus, despite the integrated transformer, the proposed converter can effectively constrain the output current ripple.

Figure 17 shows the measured efficiency of the proposed and conventional PSFB converters. In the minimum input voltage condition, the efficiency of the proposed converter is almost the same as that of PSFB converter because the PSFB converter operates with a duty ratio near 0.5. Meanwhile, in the nominal and maximum input voltage conditions, as previously analyzed, the proposed converter shows higher efficiency over the 30% load conditions due to the reduced circulating and conduction loss of the Q₂ and Q₃ switches. On the other hand, because of large core loss and small magnetizing inductances of the integrated transformer, the efficiency of the proposed converter is similar to that of the conventional PSFB converter under light load condition. However, since the importance of the high heavy load efficiency is gradually increased, the proposed converter is attractive for the LDC converter of the vehicle applications. Moreover, the proposed converter is a very promising converter for other wide input and high output power applications due to its high efficiency and high power density characteristics.

5. Conclusions

In this paper, a novel FBACFF converter with an integrated transformer sharing primary windings is proposed to achieve high efficiency and high power density LDC converter for vehicle applications. The operation principles and features are analyzed and illustrated, and the effectiveness of the proposed converter is verified by the experimental results with 13.6 V and 1.8 kW prototype. In the proposed converter, due to the full-bridge active-clamp structure, the proposed converter can reduce the primary conduction loss by eliminating the circulating current and utilize low cost Si-MOSFETs by relieving burden of the primary voltage stress. In addition, the proposed converter can improve power density through the integrated transformer with the shared and wounded inside windings. Furthermore, the secondary side structure can be simplified and optimized. Based on these advantages, the proposed converter can achieve not only high efficiency and high power density but also low cost. Therefore, the proposed converter is expected to be widely adopted for applications with wide input voltage range and high output current such as the LDC converter for vehicle applications. The efficiency and power density of the proposed converter can be much improved with planar transformer and synchronous rectification techniques.