Design of a Filtering Power Divider with Simple Symmetric Structure Using Stubs

Abstract

A power divider (PD) with a wide stopband and simple symmetric structure using open- and short-ended stubs is analyzed and implemented in this paper. In the proposed power divider, for the first time, the output resistor is divided into two sections and open- and short-ended stubs are used between the resistors. The incorporated open- and short-ended stubs have resulted in a controllable bandwidth for the proposed PD, which resulted in 40% of the fractional bandwidth considering 3 dB attenuation of insertion loss. The proposed PD operates at 2 GHz, which shows more than 20 dB attenuation for the return and isolation losses. In addition, the obtained insertion loss at the operating frequency is approximately 0.3 dB, which shows a minor loss, and also, high isolation is achieved in the device. Moreover, 20 dB and 30 dB attenuation levels have been achieved for second and third harmonics. The results show high performance for the proposed power divider.

1. Introduction

Power dividers are important components in microwave and radio frequency fields. The power dividers are used to divide the radio frequency signals into a specific ratio in the desired operating frequency. With the growth in wireless communications, the demand for power dividers with a compact size, low loss, and high performance has increased. Power dividers can be realized using lumped elements, microstrip transmission lines, or hybrid composite lines according to specifications [1,2]. Among the different types of power dividers, Wilkinson power dividers (WPDs) are a good choice for modern communication applications because of their full port matching, low loss, and high isolation.

Recently, several techniques have been introduced to reduce the size and improve the functionality of power dividers [3]. These features, such as multi-band operation [4], wideband operation [5], multi-ports [6], asymmetric structure [7], filter usage [8,9], and harmonics suppression [10], have been investigated in recent works. Moreover, recently, optical fiber substrates [11,12] have been employed to achieve higher frequencies for power dividers [13,14]. Moreover, artificial intelligence (AI) techniques [15,16,17] and optimization methods [18,19,20], which are powerful tools, have been utilized to design PDs and other microwave components [21,22].

Furthermore, the integrated waveguide is a technique that has been recently used to obtain a compact filtering power divider. In [23], the integrated waveguide technique with cavities was exploited to obtain a compact divider. Dual-band operation has been obtained in this work, but the insertion losses in the pass bands are high and the suppression band is not wide enough.

In [24], metamaterial and ring resonators were used to design a tri-band power divider for different applications. However, this divider size is rather large, and bandwidths of operating frequencies are narrow, such that the shifted frequencies in the fabrication process degraded the performance of the divider at operating frequencies. Open stubs, radial stubs, and rectangular resonators have been used to design a WPD (Wilkinson power divider) for GSM applications [25]. A Gysel divider based on composite transmission lines has been designed in [26]. The proposed transmission lines in [25] can be used to control the three operating bandwidths of the divider, but the divider size is rather large.

A generalized architecture for the power divider was presented in [27], using open stubs, radial lines, and a multi-stage structure. The dividers presented in [27] show dual- or triple-band operation, but the device size is larger than the typical one. A divider with open stubs and tapered resonators was presented [28] to obtain a wide suppression band. The divider designed in [28] was used for antenna array applications, but the size of this divider was rather large. A multi-band divider was presented in [29] using open stubs and multi-mode resonators, which achieved a wide suppression band. Furthermore, the open stubs in [29] were used to amend the isolation of the divider.

Recently, new design techniques have been presented to design wideband power dividers [30,31,32]. In [30], coupled lines and the multi-section technique were used to achieve dual-band and wideband operations. Furthermore, in [31,32], a multi-section structure and analytic design method were used to design power dividers with wideband and dual-band operations. Coupled lines and open stubs were used in [33] to design filtering response dividers with frequency reconfigurable ability. However, in [33], a wide suppression band was not achieved.

In all of the mentioned works, open- and short-ended stubs and other resonators were utilized for miniaturization or to provide a suppression band. However, in the proposed work, the open- and short-ended stubs are not only used to provide the suppression band, but are also utilized to control the operating bandwidth with a very simple structure. Furthermore, in the presented structure, two resistors are employed to obtain high isolation. Although a very simple structure is designed for the proposed WPD, high performances, such as more than 20 dB attenuation for the return loss and isolation, are achieved. In addition, the obtained insertion loss at the operating frequency is approximately 0.3 dB, which shows a minor loss, and also, high isolation is achieved in the device. Moreover, 20 dB and 30 dB attenuation levels have been achieved for second and third harmonics.

2. Design of the Power Divider Circuit

The presented circuit is a WPD with a single input and two output ports. At first, a typical WPD is presented and investigated, and then the proposed circuit is studied.

Typical Power Divider

Figure 1 shows a typical WPD including two main quarter-wavelength branches and a single resistor, where the resistor is used to provide isolation in the device. The main branches’ impedance is 70.7 Ω and their electrical length is 90°.

A typical WPD is simulated on the Rogers/5880 substrate with ADS momentum software. The thickness, loss tangent, and ε_r of the applied substrate are 0.508 mm, 0.0009, and 2.2, respectively. The frequency response and layout of the typical WPD at an operating frequency of 2 GHz are depicted in Figure 2.

It can be concluded from the typical WPD results that the WPD does not have a compact size and it does not have the desirable suppression band, which may result in the presence of unwanted harmonics. In the following sections, it will be explained that the proposed divider can improve the scattering parameters and also achieve a desirable suppression band and compact size.

3. Structure of the Proposed WPD

As mentioned, the short-ended and open-ended stubs, along with the meandered lines and stepped impedance, are considered to design the proposed WPD. The design steps of the proposed circuit are described in the following subsections.

3.1. Output Short-Ended Stub

At this step, a short-ended stub is incorporated between the output ports of the divider. As mentioned before, isolation resistance is needed between the divider’s output ports, so this resistance is divided into two parts and the short-ended stub is added between them. The frequency response and layout of the initial design power divider are depicted in Figure 3.

Comparing the initial WPD and typical WPD results, it can be shown that adding the short-ended stub between the divider output ports resulted in a frequency response improvement, such that the isolation and return loss decreased below −30 dB attenuation. Furthermore, the −3 dB fractional bandwidth (FBW) increased by 80%.

3.2. Input Short-Ended Stub

To improve the proposed power divider’s frequency response, a short-ended stub is added at the input of the WPD. This short-ended stub is connected to the input port and located inside the divider structure to maintain the overall size of the device. The frequency response and layout of the basic design WPD are shown in Figure 4. As can be seen in Figure 4, adding the input short-ended stub in the basic power divider design resulted in an input return loss below the −30 dB attenuation level at the operating frequency.

3.3. Odd and Even-Mode Analyses

The odd- and even-mode equivalent circuits for the initial design of the WPD structure at an operating frequency of 2 GHz are depicted in Figure 5. It should be mentioned that the simulation results for the initial design WPD structure at an operating frequency of 2 GHz are shown in Figure 3b. From the odd-mode equivalent circuit in Figure 5a, Equation (1) can be extracted.

$$\frac{2}{R(\Omega )}+\frac{-j\cot \left({\theta }_1\right)}{2Z_1(\Omega )}=\frac{1}{50(\Omega )}$$

(1)

By equating the imaginary and real parts of Equation (1), it can be concluded that R = 100 Ω and θ₁ = 90°. Furthermore, the even-mode equivalent circuit impedance relations can be written as shown in Equation (2).

$$\frac{Z_1(\Omega )+j\times 100(\Omega )\times tan\left({\theta }_1\right)}{100(\Omega )\times +j\times Z_1{}^2{(\Omega )}^{2}tan\left({\theta }_1\right)}+\frac{1}{Z_M(\Omega )+50(\Omega )}=\frac{1}{50(\Omega )}$$

(2)

We assume the value of θ₂ = 90° results in Z_M = 0. Moreover, by considering the obtained value of θ₁ = 90° in Equation (2), the values of Z₁ will be calculated as Z₁ = 70.7 Ω.

The odd- and even-mode equivalent circuits for the basic design of the WPD structure at an operating frequency of 2 GHz are depicted in Figure 6. It should be mentioned that the simulation results for the basic design of the WPD structure at an operating frequency of 2 GHz are shown in Figure 4b. It can be seen that the odd mode of the two circuits in Figure 5 and Figure 6 is the same, so it can be concluded that R = 100 Ω and θ₁ = 90°. Furthermore, the impedance relations of the even-mode equivalent circuit can be written in Equation (3).

$$\frac{-j\cot \left(\theta 3\right)}{2Z_3(\Omega )}+\frac{Z_1(\Omega )+j\times 50(\Omega )\times tan\left({\theta }_1\right)}{50(\Omega )\times Z_1(\Omega )+j\times Z_1{}^2{(\Omega )}^{2}tan\left({\theta }_1\right)}=\frac{1}{100(\Omega )}$$

(3)

Considering the obtained value of θ₁ = 90° in Equation (3), the values of Z₁ and θ₃ will be calculated as Z₁ = 70.7 Ω and θ₃ = 90° will be achieved. From both circuit analyses, it can be concluded that the values of Z₂ and Z₃ can be freely changed while the equations are valid. Therefore, the values Z₂ and Z₃ can be used to tune the desired bandwidth of the divider.

3.4. Final Design of the Proposed WPD

By combining the previous initial and basic designs, the final design of the proposed power divider can be obtained. In the final design, both input and output short-ended stubs are used in the PD structure. The schematic and frequency response of the proposed divider is shown in Figure 7. The FBW of the schematic design of the proposed WPD based on a 3 dB attenuation level is 45% from 1.45 GHz up to 2.3 GHz. Furthermore, the FBW of the schematic design of the proposed divider considering a 10 dB input return loss is 20% from 1.8 GHz up to 2.2 GHz.

Furthermore, the layout of the proposed WPD is depicted in Figure 8. The applied transmission line values in the final design of the proposed WPD are listed in

Table 1. The applied transmission line values in the proposed power divider.

Param.	Value (mm)	Param.	Value (mm)	Param.	Value (mm)
L1	6.8	L5	11	L9	12.5
L2	3.5	L6	8.5	L10	8.7
L3	23.6	L7	5.8	W1	2.1
L4	9.2	L8	3.4	W2/W3	1.3/2.4

.

4. Simulation Results

The proposed WPD layout, which operates at 2 GHz, is simulated with the assistance of ADS software using the Rogers/5880 substrate. The simulated S-parameters of the designed WPD are illustrated in Figure 9a,b.

As seen from the simulated results, at this operating frequency, the isolation and insertion losses are approximately 30 dB and 0.1 dB, respectively. Moreover, the input and output return losses are approximately 28 dB and 44 dB, respectively. In addition, the third and second harmonics are suppressed with a high attenuation level.

Moreover, the equivalent lumped-elements circuit of the proposed WPD and its simulation results are depicted in Figure 10a and b, respectively. As can be seen, two transmission zeros near 4 GHz and 6 GHz are created to suppress the second and third harmonics of the proposed WPD.

The surface current distribution in the proposed divider is depicted in Figure 11. As seen in Figure 11a, the current is distributed uniformly at the output ports in the main frequency. Furthermore, Figure 11b,c show that the current has not reached the output at the second and third harmonics, which proves the harmonic suppression ability of the proposed WPD.

5. Experimental Results

To verify the simulation results, the proposed device is fabricated and measured. The fabricated device is depicted in Figure 12. The proposed WPD experimental results are shown in Figure 13a,b. The E8362B Network Analyzer is considered to perform the experimental measurement for the proposed power divider.

According to the achieved experimental results, the isolation and insertion losses are approximately 20 dB and 0.3 dB, respectively, at the main frequency. Furthermore, the measured input and output return losses are approximately 21 dB and 26 dB, respectively, at the main frequency. In addition, the second and third harmonics are suppressed with a high attenuation level of 30 dB and 20 dB, respectively. The fractional bandwidth (FBW) of the proposed divider considering a 10 dB input return loss is 17% corresponding to 1.83 GHz up to 2.17 GHz, which is indicated with an FBW1 box in the frequency response in Figure 13a. Moreover, the FBW based on a 3 dB attenuation level is 40% from 1.5 GHz to 2.25 GHz, which is indicated with an FBW2 box in the frequency response in Figure 13a. Figure 13b shows the output return loss (|S₂₂|) and isolation (|S₃₂|) of the proposed power divider. As seen in Figure 13b, the desirable output return loss and isolation are obtained near the operating frequency. The performances of the fabricated WPD are compared with related dividers in

Table 2. The comparison between performances of the fabricated WPD and related dividers.

Ref.	Freq (GHz)	FBW (%)	Input Return Loss	Output Return Loss	Isolation	Insertion Loss (dB)	Suppressed Harmonics Level (dB)		Filtering Response
							2nd	3rd
[3]	2.4	28	22 dB	30 dB	23 dB	0.8	20	20	Yes
[34]	2.65	48	27 dB	N/A	22 dB	0.4	-	29	No
[35]	0.9	N/A	24 dB	N/A	N/A	0.32	-	22	No
[36]	1	34	20 dB	17 dB	20 dB	0.1	31	50	No
[37]	1	21	20 dB	20 dB	20 dB	0.2	30	30	No
[38]	4.5	66	12 dB	12 dB	10 dB	0.3	22	24	Yes
[39]	0.5	14	26 dB	26 dB	39 dB	0.27	-	-	No
[40]	5.9	27	11 dB	N/A	30 dB	0.4	35	-	Yes
This Work	2	17 */40 **	21 dB	26 dB	20 dB	0.3	30	20	Yes

* The FBW considering 10 dB attenuation for input return loss. ** The FBW considering 3 dB attenuation for insertion loss.

. As seen, the designed WPD with a new structure has achieved high performance compared to the related dividers. The overall size of the proposed power divider is 36.7 mm × 27.5 mm, which is equivalent to 0.32λ_g × 0.24λ_g, where λ_g is the guided wavelength at the center frequency of 2 GHz.

6. Conclusions

In this paper, a new structure of WPD with a wide suppression band is designed and fabricated, which follows the modern communication system’s specifications. The proposed device operates at 2 GHz, which shows 30 dB and 20 dB attenuation for second and third harmonics, respectively. Open-ended and short-ended stubs are used for the performance improvement of the presented divider. The open- and short-ended stubs were used between the divided output resistor in the proposed power divider for the first time, which resulted in achieving a controllable bandwidth, high levels of harmonic suppression, and low insertion loss. Moreover, two resistors were used between output ports to improve the isolation between output ports. The results showed that desirable parameters of the divider were obtained, in terms of input return loss, output return loss, and isolation.