High Mobility 4H-SiC MOSFETs Using Lanthanum Silicate Interface Engineering and ALD Deposited SiO2

Xiang Yu Yang; Bong Mook Lee; Veena Misra

doi:10.4028/www.scientific.net/MSF.778-780.557

Paper Titles

Degradation of SiO₂/SiC Interface Properties due to Mobile Ions Intrinsically Generated by High-Temperature Hydrogen Annealing
p.541

Reliability of Gate Oxides on 4H-SiC Epitaxial Surface Planarized by CMP Treatment
p.545

Characterization of La_xHf_yO Gate Dielectrics in 4H-SiC MOS Capacitor
p.549

Si Emission into the Oxide Layer during Oxidation of Silicon Carbide
p.553

High Mobility 4H-SiC MOSFETs Using Lanthanum Silicate Interface Engineering and ALD Deposited SiO₂
p.557

Retarded Oxide Growth on 4H-SiC(0001) Substrates due to Sacrificial Oxidation
p.562

Nano-Scale Native Oxide on 6H-SiC Surface and its Effect on the Ni/Native Oxide/SiC Interface Band Bending
p.566

MOS Interfacial Studies Using Hall Measurement and Split C-V Measurement in n-Channel Carbon-Face 4H-SiC MOSFET
p.571

Reduction of Density of 4H-SiC / SiO₂ Interface Traps by Pre-Oxidation Phosphorus Implantation
p.575

HomeMaterials Science ForumMaterials Science Forum Vols. 778-780High Mobility 4H-SiC MOSFETs Using Lanthanum...

High Mobility 4H-SiC MOSFETs Using Lanthanum Silicate Interface Engineering and ALD Deposited SiO₂

Abstract:

In this work, we have developed a novel gate stack to enhance the mobility of Si face (0001) 4H-SiC lateral MOSFETs while maintaining a high threshold voltage. The gate dielectric consists a thin lanthanum silicate layer at SiC/dielectric interface and SiO₂ deposited by atomic layer deposition. MOSFETs using this interface engineering technique show a peak field effect mobility of 133.5 cm²/Vs while maintaining a positive threshold voltage of above 3V. The interface state density measured on MOS capacitor with lanthanum silicate interfacial layers is reduced compared to the capacitors without the silicate. It is shown that the presence of the lanthanum at the interface reduces the formation of a lower quality SiO_x interfacial layer typically formed at the SiC surface during typical high temperature anneals. This better quality interfacial layer produces a sharp SiC/dielectric interface, which is confirmed by cross section Z-contrast STEM images.

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Periodical:

Materials Science Forum (Volumes 778-780)

Pages:

557-561

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.778-780.557

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Online since:

February 2014

Authors:

Xiang Yu Yang, Bong Mook Lee, Veena Misra

Keywords:

4H-SiC, ALD, La₂O₃, Mobility, MOS

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