Overlapping-Gate Architecture for Silicon Hall Bar MOSFET Devices in the Low Electron Density and High Magnetic Field Regime

Laurens H. Willems Van Beveren; Kuan Yen Tan; Nai Shyan Lai; Oleh Klochan; Andrew S. Dzurak; Alex R. Hamilton

doi:10.4028/www.scientific.net/MSF.700.93

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Design Parameters for a Two-State Nanomemory Device
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Effect of Valence-Band Mixing on Density Oscillations in 2D Hole Systems
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Overlapping-Gate Architecture for Silicon Hall Bar MOSFET Devices in the Low Electron Density and High Magnetic Field Regime
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HomeMaterials Science ForumMaterials Science Forum Vol. 700Overlapping-Gate Architecture for Silicon Hall Bar...

Overlapping-Gate Architecture for Silicon Hall Bar MOSFET Devices in the Low Electron Density and High Magnetic Field Regime

Abstract:

A common issue in low temperature measurements of enhancement-mode metal-oxide-semiconductor (MOS) field-effect transistors (FETs) in the low electron density regime is the high contact resistance dominating the device impedance. In that case a voltage bias applied across the source and drain contact of a Hall bar MOSFET will mostly fall across the contacts (and not across the channel) and therefore magneto-transport measurements become challenging. However, from a physical point of view, the study of MOSFET nanostructures in the low electron density regime is very interesting (impurity limited mobility [1], carrier interactions [2,3] and spin-dependent transport [4]) and it is therefore important to come up with solutions [5,6] that work around the problem of a high contact resistance in such devices (c.f. Fig. 1 (a)).