| Title | Implementation of n+ and p+ Poly Junctions on Front and Rear Side of Double-Side Contacted Industrial Silicon Solar Cells |
| Author(s) | Robby Peibst, Yevgeniya Larionova, Sina Reiter, Mircea Turcu, Rolf Brendel, Dominic Tetzlaff, J. Krügener, Tobias Wietler, Uwe Höhne, J.-D. Kähler, Heiko Mehlich, Steffen Frigge |
| Keywords | Passivation, Polycrystalline Silicon (Si), Silicon Solar Cell(s), Carrier Selective Contacts |
| Topic | Wafer-Based Silicon Solar Cells and Materials Technology |
| Subtopic | Silicon Solar Cells Improvements and Innovation |
| Event | EU PVSEC 2016 |
| Session | 2BO.3.2 |
| Pages manuscript | 323 - 327 |
| ISBN | 3-936338-41-8 |
| DOI | 10.4229/EUPVSEC20162016-2BO.3.2 |
We present building blocks for double-side contacted cells with poly-Si on passivating interfacial oxides (POLO) junctions for both polarities, fabricated by a lean process flow. For this purpose, we evaluate p+ and n+ POLO junctions utilizing ~1.7 nm thin wet chemically grown (ozone diluted in di-ionized water) and ozone grown interfacial oxides on different surface morphologies. We achieve excellent passivation quality on damaged etched (100) surfaces with record low J0 values of 0.6 fA/cm2 (implied open circuit voltage Voc,impl 748 mV) for n+ POLO junctions and of 5 fA/cm2 (Voc,impl 729 mV) for p+ POLO junctions. However, on alkaline textured surfaces, ~6 times higher J0 values are obtained. We compare ex-situ-doped poly-Si (intrinsically deposited and subsequently ion implanted) with in-situ-doped poly-Si layers. For POLO junctions formed on textured surfaces by utilizing wet chemical oxides and low-pressure chemical vapor deposition (LP-CVD) of 20 nm in-situ n+-doped poly-Si, we obtain J0 values down to 2.4 fA/cm2. Also with plasma-enhanced chemical vapor deposition (PE-CVD) of in-situ-doped amorphous Si and subsequent crystallization, we obtain comparable results. A transparent conductive oxide (TCO), preferably temperature stable, seems to be required to support the limited lateral conductivity of POLO junctions with poly-Si layer thicknesses ≤ 20 nm. We find that the conductivity of indium tin oxide (ITO) strongly decreases upon firing, while the initial conductivity can be maintained even for firing temperatures of 800°C when capping the ITO with a thin SiNx layer. Our recent cell precursors (156 mm 156 mm Cz n-type wafers with an n+ POLO junction on an alkaline textured front-side and a p+ POLO junction on a damage-etched rear-side) exhibit a promising Voc,impl value of 732 mV, and a total J0 value of the doped surfaces of 12 fA/cm2. In combination with the high pseudo fill factor of 85.3 % and with a short-circuit current density of 40 mA/cm2 as calculated by ray tracing simulations, the corresponding pseudo efficiency is 25.0 %.
