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Mixed-mode Simulation of Switching Characteristics of SiC DMOSFETs

Mixed-mode 시뮬레이션을 이용한 SiC DMOSFETs의 스위칭 특성 분석

  • 강민석 (광운대학교 전자재료공학과) ;
  • 최창용 (광운대학교 전자재료공학과) ;
  • 방욱 (한국전기연구원 에너지반도체연구센터) ;
  • 김상철 (한국전기연구원 에너지반도체연구센터) ;
  • 김남균 (한국전기연구원 에너지반도체연구센터) ;
  • 구상모 (광운대학교 전자재료공학과)
  • Published : 2009.09.01

Abstract

SiC power device possesses attractive features, such as high breakdown voltage, high-speed switching capability, and high temperature operation. In general, device design has a significant effect on the switching characteristics, In this paper, we demonstrated that the switching performance of DMOSFETs are dependent on the with Channel length ($L_{channel}$) and Current Spreading Layer thickness ($T_{CSL}$) by using 2-D Mixed-mode simulations. The 4H-SiC DMOSFETs with a JFET region designed to block 800 V were optimized for minimum loss by adjusting the parameters of the JFET region, CSL, and epilayer. It is found that improvement of switching speed in 4H-SiC DMOSFETs is essential to reduce the gate-source capacitance and channel resistance. Therefore, accurate modeling of the operating conditions are essential for the optimizatin of superior switching performance.

Keywords

References

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