Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Comparison of Efficiency of Flash Memory Device Structure in Electro-Thermal Erasing Configuration

플래시메모리소자의 구조에 대한 열적 데이터 삭제 효율성 비교

  • Kim, You-Jeong (School of Electronics Engineering, Chungbuk National University) ;
  • Lee, Seung-Eun (School of Electronics Engineering, Chungbuk National University) ;
  • Lee, Khwang-Sun (School of Electronics Engineering, Chungbuk National University) ;
  • Park, Jun-Young (School of Electronics Engineering, Chungbuk National University)
  • Received : 2022.04.01
  • Accepted : 2022.04.22
  • Published : 2022.09.01
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Abstract

The electro-thermal erasing (ETE) configuration utilizes Joule heating intentionally generated at word-line (WL). The elevated temperature by heat physically removes stored electrons permanently within a very short time. Though the ETE configuration is a promising next generation NAND flash memory candidate, a consideration of power efficiency and erasing speed with respect to device structure and its scaling has not yet been demonstrated. In this context, based on 3-dimensional (3-D) thermal simulations, this paper discusses the impact of device structure and scaling on ETE efficiency. The results are used to produce guidelines for ETEs that will have lower power consumption and faster speed.

Keywords

Acknowledgement

This work was partially supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MIST) (No. 2021R1F1A1049456). This research was also partially supported by the MSIT (Ministry of Science and ICT), Korea, under the Grand Information Technology Re-search Center support program (IITP-2022-2020-0-01462) supervised by the IITP (Institute for Information & communications Technology Planning & Evaluation).

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