Title: An Accelerated VLSI Approach for K-Means Clustering Algorithm for the application of Microarray Data Analysis


Authors:

Ila Roy Saxena

illaroy611@gmail.com
Department of Electronics and Communication, Swami Keshvanand Institute of Technology, Management & Gramothan Jaipur-302017 (INDIA),

Vikas Pathak

ijskit@skit.ac.in
Department of Electronics and Communication, Swami Keshvanand Institute of Technology, Management & Gramothan Jaipur-302017 (INDIA),

Manju Choudhary

ijskit@skit.ac.in
Department of Electronics and Communication, Swami Keshvanand Institute of Technology, Management & Gramothan Jaipur-302017 (INDIA),

Himanshu Sharma

ijskit@skit.ac.in
Department of Electronics and Communication, Swami Keshvanand Institute of Technology, Management & Gramothan Jaipur-302017 (INDIA)


Abstract:

This paper proposed a parallel and pipelined architecture for faster execution of k-means clustering algorithm for microarray data analysis. This is verified by calculating the computational time of algorithm when run on XILINX ISE 14.4 and MATLAB. The computational time taken by MATLAB simulation it is 14.2390ms while for VLSI simulation is found to be 0.0754ms hence VLSI simulation is 188 times faster than MATLAB Simulation. Also, computational time of proposed work which is 0.0754 ms, is compared with the previous work time which is 0.5891 ms and it is found that proposed work is 7 times faster than previous work.

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